Inventor
Jiunn-Ren Hwang
Inventor
Hsinchu, TW
Overview
Patents· 36 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G03Fprimary
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices24%
H10DInorganic electric semiconductor devices24%
H10BElectronic memory devices11%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests10%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
G11CStatic stores5%
H01JElectric discharge tubes or discharge lamps3%
H10NElectric solid-state devices not otherwise provided for3%
G01BMeasuring length, thickness or similar linear dimensions2%
PatentTitleYear
8,772,056'Dummy pattern design for thermal annealing'20148,653,576'Method of fabricating a SONOS gate structure with dual-thickness oxide'20148,618,610'Dummy pattern design for thermal annealing'20138,173,990'Memory array with a selector connected to multiple resistive cells'20127,847,335'Non-volatile memory device having a generally L-shaped cross-section sidewall SONOS'20107,714,376'Non-volatile memory device with polysilicon spacer and method of forming the same'20107,663,134'Memory array with a selector connected to multiple resistive cells'20107,589,387'SONOS type two-bit FinFET flash memory cell'20097,482,236'Structure and method for a sidewall SONOS memory device'20097,482,231'Manufacturing of memory array and periphery'20097,405,119'Structure and method for a sidewall SONOS memory device'20087,355,236'Non-volatile floating gate memory cells with polysilicon storage dots and fabrication methods thereof'20087,326,622'Method of manufacturing semiconductor MOS transistor device'20087,297,450'Optical proximity correction method'20077,186,657'Method for patterning HfO2-containing dielectric'20077,176,084'Self-aligned conductive spacer process for sidewall control gate of high-speed random access memory'20077,063,923'Optical proximity correction method'20066,974,650'Method of correcting a mask layout'20056,853,031'Structure of a trapezoid-triple-gate FET'20056,839,126'Photolithography process with multiple exposures'20056,767,679'Correcting the polygon feature pattern with an optical proximity correction method'20046,680,163'Method of forming opening in wafer layer'20046,664,028'Method of forming opening in wafer layer'20036,656,667'Multiple resist layer photolithographic process'20036,638,664'Optical mask correction method'20036,613,485'Optical proximity correction of pattern on photoresist through spacing of sub patterns'20036,589,881'Method of forming dual damascene structure'20036,579,790'Dual damascene manufacturing process'20036,580,135'Silicon nitride read only memory structure and method of programming and erasure'20036,541,782'Electron beam photolithographic process'20036,429,425'Method for forming a calibation standard to adjust a micro-bar of an electron microscope'20026,391,757'Dual damascene process'20026,380,077'Method of forming contact opening'20026,337,269'Method of fabricating a dual damascene structure'20026,316,340'Photolithographic process for preventing corner rounding'20016,312,855'Three-phase phase shift mask'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001–2008Patents assigned to UNITED MICROELECTRONICS CORP (20)· patent assignee history
2001–2014Based in Hsinchu, TW· patent location history
2002Based in Taichung, TW· patent location history
2002Based in Taichiung, TW· patent location history
2003Based in Tainan, TW· patent location history
2007–2014Patents assigned to TAIWAN SEMICONDUCTOR MFG (13)· patent assignee history
2012–2014Patents assigned to HWANG JIUNN-REN (3)· patent assignee history
2012–2014Patents assigned to LEE TZYH-CHEANG (2)· patent assignee history
2014Patents assigned to LEE TSUNG-LIN (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| UNITED MICROELECTRONICS CORP | 20 | 2001–2008 |
| TAIWAN SEMICONDUCTOR MFG | 13 | 2007–2014 |
| HWANG JIUNN-RENself | 3 | 2012–2014 |
| LEE TZYH-CHEANG | 2 | 2012–2014 |
| LEE TSUNG-LIN | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 31 | 2001–2014 |
| Tainan, TW | 2 | 2003 |
| Taichung, TW | 2 | 2002 |
| Taichiung, TW | 1 | 2002 |