Inventor
Justus Kuhn
Inventor
München, DE
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores57%
G01RMeasuring electric variables21%
G06FElectric digital data processing7%
G06KGraphical data reading7%
B82YSpecific uses or applications of nanostructures4%
H10DInorganic electric semiconductor devices4%
PatentTitleYear
10,929,734RFID tag clock frequency reduction during tuning202110,885,417Impedance-change mitigation in RFID tags20217,307,895'Self test for the phase angle of the data read clock signal DQS'20077,117,404'Test circuit for testing a synchronous memory circuit'20067,117,403'Method and device for generating digital signal patterns'20067,062,690'System for testing fast synchronous digital circuits, particularly semiconductor memory chips'20067,043,653'Method and apparatus for synchronous signal transmission between at least two logic or memory components'20066,957,373'Address generator for generating addresses for testing a circuit'20056,954,871'Method of matching different signal propagation times between a controller and at least two processing units, and a computer system'20056,910,161'Device and method for reducing the number of addresses of faulty memory cells'20056,871,306'Method and device for reading and for checking the time position of data response signals read out from a memory module to be tested'20056,865,707'Test data generator'20056,862,702'Address counter for addressing synchronous high-frequency digital circuits, in particular memory devices'20056,853,206'Method and probe card configuration for testing a plurality of integrated circuits in parallel'20056,839,397'Circuit configuration for generating control signals for testing high-frequency synchronous digital circuits'20056,762,611'Test configuration and test method for testing a plurality of integrated circuits in parallel'20046,744,272'Test circuit'20046,721,904'System for testing fast integrated digital circuits, in particular semiconductor memory modules'20046,618,305'Test circuit for testing a circuit'20036,556,492'System for testing fast synchronous semiconductor circuits'20036,515,319'Field-effect-controlled transistor and method for fabricating the transistor'2003Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2003–2007Patents assigned to INFINEON TECHNOLOGIES AG (17)· patent assignee history
2003–2004Based in Mnchen, DE· patent location history
2003–2005Based in Munich, DE· patent location history
2004Patents assigned to INFINEON TECHOLOGIES AG (1)· patent assignee history
2005–2007Based in München, DE· patent location history
2021Patents assigned to IMPINJ INC (2)· patent assignee history
2021Based in Seattle, WA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INFINEON TECHNOLOGIES AG | 17 | 2003–2007 |
| IMPINJ INC | 2 | 2021 |
| INFINEON TECHOLOGIES AG | 1 | 2004 |
Locations
| Location | Patents | Span |
|---|---|---|
| München, DE | 12 | 2005–2007 |
| Mnchen, DE | 4 | 2003–2004 |
| Munich, DE | 3 | 2003–2005 |
| Seattle, Washington, US | 2 | 2021 |