Inventor
Yasufumi Mori
Inventor
Tokyo, JP
Overview
Patents· 4 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing43%
G01RMeasuring electric variables14%
G11CStatic stores14%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1014%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use14%
PatentTitleYear
7,809,997'Semiconductor device, unique ID of semiconductor device and method for verifying unique ID'20106,748,464'Semiconductor device comprising CPU and peripheral circuit wherein control unit performs wait cycle control that makes peripheral circuit wait a predetermined time before responding to CPU'20046,720,636'Semiconductor device with a staggered pad arrangement'20045,715,171'Logical synthesizing device, logical synthesizing method, and semiconductor integrated circuit'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1998–2004Patents assigned to MITSUBISHI ELECTRIC CORP (2)· patent assignee history
1998Based in Hyogo, JP· patent location history
2004Patents assigned to RENESAS TECH CORP (1)· patent assignee history
2004–2010Based in Tokyo, JP· patent location history
2010Patents assigned to RENESAS ELECTRONICS CORP (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MITSUBISHI ELECTRIC CORP | 2 | 1998–2004 |
| RENESAS ELECTRONICS CORP | 1 | 2010 |
| RENESAS TECH CORP | 1 | 2004 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tokyo, JP | 3 | 2004–2010 |
| Hyogo, JP | 1 | 1998 |