LexDanaLexDanabeta
Inventor

Robert J. Falster

Inventor
London, GB

Overview

73→
Patents
1993–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 73 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1031%
C30BSingle-crystal growth24%
Y10TTechnical subjects covered by former us classification17%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests9%
H01LSemiconductor devices5%
H10DInorganic electric semiconductor devices4%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
A61KPreparations for medical, dental or toiletry purposes2%
Y02PClimate change mitigation technologies in the production or processing of goods2%
G01NInvestigating or analysing materials by determining their chemical or physical properties1%
PatentTitleYear
10,707,093Method of treating silicon wafers to have intrinsic gettering and gate oxide integrity yield202010,453,703Method of treating silicon wafers to have intrinsic gettering and gate oxide integrity yield201910,361,097Apparatus for stressing semiconductor substrates20199,634,098'Oxygen precipitation in heavily doped silicon wafers sliced from ingots grown by the Czochralski method'20179,583,363'Processes and apparatus for preparing heterostructures with reduced strain by radial distension'20179,583,364'Processes and apparatus for preparing heterostructures with reduced strain by radial compression'20179,142,616'Silicon wafers with suppressed minority carrier lifetime degradation'20159,129,919'Production of high precipitate density wafers by activation of inactive oxygen precipitate nuclei'20158,969,119'Processes for suppressing minority carrier lifetime degradation in silicon wafers'20158,026,145'Arsenic and phosphorus doped silicon wafer substrates having intrinsic gettering'20117,618,879'Non-uniform minority carrier lifetime distributions in high performance silicon power devices'20097,521,382'High resistivity silicon structure and a process for the preparation thereof'20097,485,928'Arsenic and phosphorus doped silicon wafer substrates having intrinsic gettering'20097,442,253'Process for forming low defect density, ideal oxygen precipitating silicon'20087,431,765'Process for preparing single crystal silicon having improved gate oxide integrity'20087,242,037'Process for making non-uniform minority carrier lifetime distribution in high performance silicon power devices'20077,229,693'Low defect density, ideal oxygen precipitating silicon'20077,135,351'Method for controlling of thermal donor formation in high resistivity CZ silicon'20067,105,050'Method for the production of low defect density silicon'20067,097,718'Single crystal silicon wafer having an epitaxial layer substantially free from grown-in defects'20067,071,080'Process for producing silicon on insulator structure having intrinsic gettering by ion implantation'20067,008,874'Process for reclaiming semiconductor wafers and reclaimed wafers'20066,986,925'Single crystal silicon having improved gate oxide integrity'20066,955,718'Process for preparing a stabilized ideal oxygen precipitating silicon wafer'20056,930,375'Silicon on insulator structure having an epitaxial layer and intrinsic gettering'20056,913,647'Process for cooling a silicon ingot having a vacancy dominated region to produce defect free silicon'20056,896,728'Process for producing low defect density, ideal oxygen precipitating silicon'20056,897,084'Control of oxygen precipitate formation in high resistivity CZ silicon'20056,858,307'Method for the production of low defect density silicon'20056,849,119'Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor'20056,849,901'Device layer of a silicon-on-insulator structure having vacancy dominated and substantially free of agglomerated vacancy-type defects'20056,828,690'Non-uniform minority carrier lifetime distributions in high performance silicon power devices'20046,803,576'Analytical method to measure nitrogen concentration in single crystal silicon'20046,743,289'Thermal annealing process for producing low defect density single crystal silicon'20046,713,370'Process for the preparation of an ideal oxygen precipitating silicon wafer capable of forming an enhanced denuded zone'20046,709,511'Process for suppressing oxygen precipitation in vacancy dominated silicon'20046,689,209'Process for preparing low defect density silicon using high growth rates'20046,686,260'Process for producing thermally annealed wafers having improved internal gettering'20046,652,646'Process for growing a silicon crystal segment substantially free from agglomerated intrinsic point defects which allows for variability in the process conditions'20036,638,357'Method for revealing agglomerated intrinsic point defects in semiconductor crystals'20036,605,150'Low defect density regions of self-interstitial dominated silicon'20036,586,068'Ideal oxygen precipitating silicon wafer having an asymmetrical vacancy concentration profile and a process for the preparation thereof'20036,579,779'Process for the preparation of an ideal oxygen precipitating silicon wafer having an asymmetrical vacancy concentration profile capable of forming an enhanced denuded zone'20036,565,649'Epitaxial wafer substantially free of grown-in defects'20036,562,123'Process for growing defect-free silicon wherein the grown silicon is cooled in a separate chamber'20036,537,368'Ideal oxygen precipitating epitaxial silicon wafers and oxygen out-diffusion-less process therefor'20036,500,255'Process for growing silicon crystals which allows for variability in the process conditions while suppressing the formation of agglomerated intrinsic point defects'20026,432,197'Process for the preparation of non-oxygen precipitating Czochralski silicon wafers'20026,416,836'Thermally annealed, low defect density single crystal silicon'20026,409,827'Low defect density silicon and a process for producing low defect density silicon wherein V/G0 is controlled by controlling heat transfer at the melt/solid interface'20026,391,662'Process for detecting agglomerated intrinsic point defects by metal decoration'20026,361,619'Thermally annealed wafers having improved internal gettering'20026,342,725'Silicon on insulator structure having a low defect density handler wafer and process for the preparation thereof'20026,336,968'Non-oxygen precipitating czochralski silicon wafers'20026,328,795'Process for growth of defect free silicon crystals of arbitrarily large diameters'20016,312,516'Process for preparing defect free silicon crystals which allows for variability in process conditions'20016,306,733'Ideal oxygen precipitating epitaxial silicon wafers and oxygen out-diffusion-less process therefor'20016,287,380'Low defect density silicon'20016,284,039'Epitaxial silicon wafers substantially free of grown-in defects'20016,236,104'Silicon on insulator structure from low defect density single crystal silicon'20016,204,152'Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor'20016,191,010'Process for preparing an ideal oxygen precipitating silicon wafer'20016,180,220'Ideal Oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor'20016,100,167'Process for the removal of copper from polished boron doped silicon wafers'20005,994,761'Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor'19995,882,989'Process for the preparation of silicon wafers having a controlled distribution of oxygen precipitate nucleation centers'19995,779,791'Process for controlling thermal history of Czochralski-grown silicon'19985,593,494'Precision controlled precipitation of oxygen in silicon'19975,418,172'Method for detecting sources of contamination in silicon using a contamination monitor wafer'19955,403,406'Silicon wafers having controlled precipitation distribution'19955,401,669'Process for the preparation of silicon wafers having controlled distribution of oxygen precipitate nucleation centers'19955,272,119'Process for contamination removal and minority carrier lifetime improvement in silicon'19935,262,646'Infra-red scanning microscopy'1993

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1993–2004Patents assigned to MEMC ELECTRONIC MATERIALS SPA (8)· patent assignee history
1993–2005Based in Milan, IT· patent location history
1993Based in Oxford, PA, US· patent location history
1995–2011Patents assigned to MEMC ELECTRONIC MATERIALS (53)· patent assignee history
2001–2019Based in London, GB· patent location history
2004–2009Patents assigned to MEMC ELECTRONICS MATERIALS INC (2)· patent assignee history
2017Patents assigned to SUNEDISON SEMICONDUCTOR LTD (UEN201334164H) (3)· patent assignee history
2019–2020Patents assigned to SUNEDISON SEMICONDUCTOR LTD UEN201334164H (3)· patent assignee history
2019–2020Based in Woodstock, GB· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MEMC ELECTRONIC MATERIALS531995–2011
MEMC ELECTRONIC MATERIALS SPA81993–2004
SUNEDISON SEMICONDUCTOR LTD (UEN201334164H)32017
SUNEDISON SEMICONDUCTOR LTD UEN201334164H32019–2020
MEMC ELECTRONICS MATERIALS INC22004–2009
Locations
LocationPatentsSpan
London, GB482001–2019
Milan, IT221993–2005
Woodstock, GB22019–2020
Oxford, Pennsylvania, US11993