Inventor

Horng-Huei Tseng

Inventor

Hsinchu, TW

Overview

1992–2021

Patent span

Electricity

Primary field (CPC H)

Patents· 370 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary

H10DInorganic electric semiconductor devices30%

H01LSemiconductor devices17%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1017%

H10BElectronic memory devices14%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1013%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests4%

H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation1%

G05BControl or regulating systems in general1%

Y02PClimate change mitigation technologies in the production or processing of goods1%

G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes0%

PatentTitleYear

11,127,586Source and drain process for FinFET2021 11,121,130Structure and formation method of semiconductor device with gate stacks2021 11,121,168Stacked grid design for improved optical performance and isolation2021 10,879,364Semiconductor structure and manufacturing method thereof2020 10,872,968Semiconductor device2020 10,872,890Semiconductor device2020 10,868,138Metal gate formation through etch back process2020 10,868,189Semiconductor device and manufacturing method thereof2020 10,868,002Semiconductor structure and manufacturing method thereof2020 10,868,188Semiconductor device and method2020 10,868,012Semiconductor device and manufacturing method thereof2020 10,861,977FinFET isolation structure2020 10,861,791Interconnection structure, fabricating method thereof, and semiconductor device using the same2020 10,854,505Removing polymer through treatment2020 10,840,242Fin structure and method of forming same through two-step etching processes2020 10,832,974FinFET gate structure and method for fabricating the same2020 10,825,892MIM capacitor with top electrode having footing profile and method forming same2020 10,811,506Self-aligned metal gate etch back process and device2020 10,811,412Method of fabricating semiconductor device2020 10,811,536FinFET device and method of forming and monitoring quality of the same2020 10,797,140Semiconductor device and method2020 10,763,258Integrated circuit and manufacturing method thereof2020 10,748,912Method for semiconductor device fabrication with improved source drain proximity2020 10,727,132Fin field effect transistor, semiconductor device and method for fabricating the same2020 10,720,460High dielectric constant dielectric layer forming method, image sensor device, and manufacturing method thereof2020 10,714,588Metal gate process for FinFET device improvement2020 10,700,208Semiconductor device and methods of manufacture2020 10,679,989Enlarging spacer thickness by forming a dielectric layer over a recessed interlayer dielectric2020 10,672,908Fin field effect transistor2020 10,643,947Semiconductor structure and manufacturing method thereof2020 10,636,787Semiconductor structure and manufacturing method thereof2020 10,636,824High dielectric constant dielectric layer forming method, image sensor device, and manufacturing method thereof2020 10,622,353Semiconductor device2020 10,546,754Semiconductor structure and manufacturing method thereof2020 10,541,298Etching process control in forming MIM capacitor2020 10,535,727Etching process control in forming MIM capacitor2020 10,535,566Semiconductor device and method of manufacture2020 10,522,536Structure and formation method of semiconductor device with gate stacks2019 10,522,635Semiconductor device and method2019 10,516,052Semiconductor device and method2019 10,515,793FinFET device2019 10,515,960Semiconductor device and method2019 10,515,959Source/drain regions in fin field effect transistors (finFETs) and methods of forming same2019 10,510,608Semiconductor structure and manufacturing method thereof2019 10,510,755Semiconductor device and manufacture method thereof2019 10,510,893Method for fabricating FinFET isolation structure2019 10,510,850Semiconductor device and method2019 10,505,003Semiconductor structure and manufacturing method thereof2019 10,497,793Method for manufacturing semiconductor structure2019 10,483,364Semiconductor structure and manufacturing method thereof2019 10,483,208Interconnection structure, fabricating method thereof, and semiconductor device using the same2019 10,468,348Method for manufacturing interconnection2019 10,460,942Method of manufacturing semiconductor structure2019 10,366,990Fin field effect transistor and semiconductor device2019 10,355,110FinFET and method of forming same2019 10,326,006FinFET device and fabricating method thereof2019 10,297,548Interconnection structure, fabricating method thereof, and semiconductor device using the same2019 10,283,605Self-aligned metal gate etch back process and device2019 10,283,641Contact structures, FinFET devices and methods of forming the same2019 10,269,793Source/drain regions in fin field effect transistors (FinFETs) and methods of forming same2019 10,269,908FinFET and method of forming same2019 10,269,795Semiconductor structure and manufacturing method thereof2019 10,263,113Semiconductor device and method2019 10,217,741Fin structure and method of forming same through two-step etching processes2019 10,177,185High dielectric constant dielectric layer forming method, image sensor device, and manufacturing method thereof2019 10,177,005Critical dimension control for double patterning process2019 10,170,427Semiconductor device and method2019 10,163,649Semiconductor structure and manufacturing method thereof2018 10,164,059FinFET device and fabricating method thereof2018 10,164,029Semiconductor structure and manufacturing method thereof2018 10,163,912Method for semiconductor device fabrication with improved source drain proximity2018 10,164,071FinFET device and fabricating method thereof2018 10,164,046Method for manufacturing semiconductor structure2018 10,164,111Semiconductor device and methods of manufacture2018 10,157,783Semiconductor devices, FinFET devices and methods of forming the same2018 10,157,918Semiconductor device and method2018 10,153,374Semiconductor device and manufacturing method thereof2018 10,147,821Fin field effect transistor2018 10,121,787Methods for fabricating Fin field effect transistors2018 10,109,627Enlarging spacer thickness by forming a dielectric layer over a recessed interlayer dielectric2018 10,096,598Methods for fabricating fin field effect transistors2018 10,096,712FinFET device and method of forming and monitoring quality of the same2018 10,090,206FinFET gate structure and method for fabricating the same2018 10,090,249Semiconductor structure and manufacturing method thereof2018 10,079,205Interconnection structure and method of forming the same2018 10,050,030Semiconductor device and fabricating method thereof2018 10,043,886Metal gate formation through etch back process2018 10,035,929pH-adjuster free chemical mechanical planarization slurry2018 10,032,913Contact structures, FinFET devices and methods of forming the same2018 10,032,877FinFET and method of forming same2018 10,032,774Semiconductor device and manufacture method thereof2018 10,020,304Fin field effect transistor, semiconductor device and fabricating method thereof2018 10,008,559Etching process control in forming MIM capacitor2018 9,997,632Fin-type field effect transistor device and manufacturing method thereof2018 9,991,307Stacked grid design for improved optical performance and isolation2018 9,991,205Semiconductor device and method2018 9,991,256Semiconductor structure and manufacturing method thereof2018 9,985,031Integrated circuit and manufacturing method thereof2018 9,953,874FinFETs and methods of forming FinFETs2018 9,954,081Fin field effect transistor, semiconductor device and fabricating method thereof2018 9,947,592FinFET devices and methods of forming the same2018 9,934,985Critical dimension control for double patterning process2018 9,929,271'Semiconductor device and method'2018 9,922,816'Source and drain process for FinFET'2018 9,923,070'Semiconductor structure and manufacturing method thereof'2018 9,899,320'Interconnection and manufacturing method thereof'2018 9,893,060'Semiconductor device and manufacturing method thereof'2018 9,893,184'Fin-type field effect transistor device and method of fabricating the same'2018 9,887,136'Semiconductor devices, FinFET devices, and methods of forming the same'2018 9,876,115FinFET isolation structure and method for fabricating the same2018 9,853,076Stacked grid for more uniform optical input2017 9,847,330Fin field effect transistor and method for fabricating the same2017 9,837,505Metal gate process for FinFET device improvement2017 9,799,651'Semiconductor structure and manufacturing method thereof'2017 9,793,407'Fin field effect transistor'2017 9,786,505'FinFET device using dummy fins for smooth profiling'2017 9,780,026'Interconnection structure and method of forming the same'2017 9,780,092'Semiconductor device having a filling conductor comprising a plug portion and a cap portion and manufacturing method thereof'2017 9,773,912'Semiconductor device and manufacturing method thereof'2017 9,768,170'Fin field effect transistor and method for fabricating the same'2017 9,761,483'Semiconductor devices, FinFET devices and methods of forming the same'2017 9,741,585'Reactive radical treatment for polymer removal and workpiece cleaning'2017 9,721,896'Interconnection structure, fabricating method thereof, and semiconductor device using the same'2017 9,716,093'Semiconductor device'2017 9,716,154'Semiconductor structure having a gas-filled gap'2017 9,704,969'Fin semiconductor device having multiple gate width structures'2017 9,704,751'Semiconductor device and method for fabricating the same'2017 9,704,752'Fin field effect transistor and method for fabricating the same'2017 9,685,554'Fin field effect transistor and semiconductor device'2017 9,659,813'Interconnection and manufacturing method thereof'2017 9,653,364'FinFET device and method of forming the same'2017 9,627,537'FinFET device and method of forming the same'2017 9,627,379'FinFET devices and methods of forming the same'2017 9,620,610'FinFET gate structure and method for fabricating the same'2017 9,601,492'FinFET devices and methods of forming the same'2017 9,602,659'Portable device with communication record recurring module'2017 9,576,908'Interconnection structure, fabricating method thereof, and semiconductor device using the same'2017 9,570,493'Dielectric grid bottom profile for light focusing'2017 9,570,567'Source and drain process for FinFET'2017 9,530,887'Fin-type field effect transistor device and manufacturing method thereof'2016 9,461,044'Fin field effect transistor, semiconductor device and fabricating method thereof'2016 9,368,394'Dry etching gas and method of manufacturing semiconductor device'2016 8,822,331'Anchored damascene structures'2014 8,368,220'Anchored damascene structures'2013 8,034,711'Bonding structure and fabrication thereof'2011 7,652,378'Aluminum-based interconnection in bond pad layer'2010 7,625,806'Method of fabricating a non-floating body device with enhanced performance'2009 7,545,662'Method and system for magnetic shielding in semiconductor integrated circuit'2009 7,514,730'Method of fabricating a non-floating body device with enhanced performance'2009 7,462,561'Contact structure formed using supercritical cleaning fluid and ALCVD'2008 7,452,805'Aluminum based conductor for via fill and interconnect'2008 7,413,991'Damascene process at semiconductor substrate level'2008 7,319,262'MRAM over sloped pillar'2008 7,265,038'Method for forming a multi-layer seed layer for improved Cu ECP'2007 7,265,447'Interconnect with composite layers and method for fabricating the same'2007 7,224,427'Megasonic immersion lithography exposure apparatus and method'2007 7,224,068'Stable metal structure with tungsten plug'2007 7,221,584'MRAM cell having shared configuration'2007 7,183,617'Magnetic shielding for magnetically sensitive semiconductor devices'2007 7,180,572'Immersion optical projection system'2007 7,180,193'Via recess in underlying conductive line'2007 7,173,305'Self-aligned contact for silicon-on-insulator devices'2007 7,105,928'Copper wiring with high temperature superconductor (HTS) layer'2006 7,049,702'Damascene structure at semiconductor substrate level'2006 6,977,218'Method for fabricating copper interconnects'2005 6,958,291'Interconnect with composite barrier layers and method for fabricating the same'2005 6,897,510'MIM capacitor having a high-dielectric-constant interelectrode insulator and a method of fabrication'2005 6,847,098'Non-floating body device with enhanced performance'2005 6,841,466'Method of selectively making copper using plating technology'2005 6,797,574'Method of fabricating W/TiN gate for MOSFETS'2004 6,791,142'Stacked-gate flash memory and the method of making the same'2004 6,730,958'Nonvolatile memory device with reduced floating gate and increased coupling ratio and manufacturing method thereof'2004 6,717,224'Flash memory cell and method for fabricating a flash'2004 6,677,224'Method of forming stacked gate for flash memories'2004 6,642,570'Structure of flash memory with high coupling ratio'2003 6,638,794'Method for fabricating an anti-fuse in programmable interconnections'2003 6,627,515'Method of fabricating a non-floating body device with enhanced performance'2003 6,620,526'Method of making a dual damascene when misalignment occurs'2003 6,620,687'Method of making non-volatile memory with sharp corner'2003 6,596,589'Method of manufacturing a high coupling ratio stacked gate flash memory with an HSG-SI layer'2003 6,589,840'Nonvolatile memory device with reduced floating gate and increased coupling ratio and manufacturing method thereof'2003 6,576,555'Method of making upper conductive line in dual damascene having lower copper lines'2003 6,576,537'Flash memory cell and method for fabricating a flash memory cell'2003 6,548,353'Method of making nonvolatile memory device having reduced capacitance between floating gate and substrate'2003 6,537,880'Method of fabricating a high density NAND stacked gate flash memory device having narrow pitch isolation and large capacitance between control and floating gates'2003 6,531,781'Fabrication of transistor having elevated source-drain and metal silicide'2003 6,528,402'Dual salicidation process'2003 6,524,939'Dual salicidation process'2003 6,503,764'Method of making in high density DRAM circuit having a stacked capacitor'2003 6,498,064'Flash memory with conformal floating gate and the method of making the same'2002 6,495,420'Method of making a single transistor non-volatile memory device'2002 6,468,862'High capacitive-coupling ratio of stacked-gate flash memory having high mechanical strength floating gate'2002 6,455,428'Method of forming a metal silicide layer'2002 6,440,869'Method of forming the capacitor with HSG in DRAM'2002 6,432,810'Method of making dual damascene structure'2002 6,429,123'Method of manufacturing buried metal lines having ultra fine features'2002 6,429,110'MOSFET with both elevated source-drain and metal gate and fabricating method'2002 6,423,633'Method for manufacturing diffusion barrier layer'2002 6,417,048'Method for fabricating flash memory with recessed floating gates'2002 6,417,033'Method of fabricating a silicon island'2002 6,413,836'Method of making isolation trench'2002 6,410,384'Method of making an electric conductive strip'2002 6,399,436'Method of making an electric conductive strip'2002 6,395,603'Method of forming a tunnel oxide layer of a non-volatile memory cell'2002 6,391,711'Method of forming electrical connection between stack capacitor and node location of substrate'2002 6,383,937'Method of fabricating a silicon island'2002 6,376,885'Semiconductor structure with metal silicide and method for fabricated the structure'2002 6,376,342'Method of forming a metal silicide layer on a source/drain region of a MOSFET device'2002 6,368,973'Method of manufacturing a shallow trench isolation structure'2002 6,358,795'Method of making stacked capacitor in memory device'2002 6,358,797'Method of forming a non-volatile memory cell'2002 6,358,800'Method of forming a MOSFET with a recessed-gate having a channel length beyond photolithography limit'2002 6,355,538'Method of forming isolation material with edge extension structure'2002 6,355,556'Method for fabricating transistor'2002 6,348,383'Method of forming poly gate and polycide gate with equal height'2002 6,344,374'Method of fabricating insulators for isolating electronic devices'2002 6,340,614'Method of forming a DRAM cell'2002 6,335,257'Method of making pillar-type structure on semiconductor substrate'2002 6,319,771'Fabrication process for a lower electrode of a memory capacitor'2001 6,316,815'Structure for isolating integrated circuits in semiconductor substrate and method for making it'2001 6,316,331'Method of making dishing-free insulator in trench isolation'2001 6,312,966'Method of forming sharp tip for field emission display'2001 6,309,923'Method of forming the capacitor in DRAM'2001 6,297,121'Fabrication method for capacitors in integrated circuits with a self-aligned contact structure'2001 6,294,413'Method for fabricating a SOI (silicon on insulator) device'2001 6,294,471'Method of eliminating dishing effect in polishing of dielectric film'2001 6,294,434'Method of forming a metal silicide layer on a polysilicon gate structure and on a source/drain region of a MOSFET device'2001 6,294,463'Method for manufacturing diffusion barrier layer'2001 6,284,653'Method of selectively forming a barrier layer from a directionally deposited metal layer'2001 6,281,087'Process for fabricating metal silicide layer by using ion metal plasma deposition'2001 6,277,688'Method of manufacturing a DRAM capacitor with increased electrode surface area'2001 6,277,739'Method of forming a barrier layer underlying a tungsten plug structure in a high aspect ratio contact hole'2001 6,271,147'Methods of forming trench isolation regions using spin-on material'2001 6,271,072'Method of manufacturing a storage node having five polysilicon bars'2001 6,271,128'Method for fabricating transistor'2001 6,268,264'Method of forming shallow trench isolation'2001 6,265,285'Method of forming a self-aligned trench isolation'2001 6,262,449'High density dynamic random access memory cell structure having a polysilicon pillar capacitor'2001 6,261,901'Method of manufacturing a DRAM capacitor with a dielectric column'2001 6,258,682'Method of making ultra shallow junction MOSFET'2001 6,225,177'Electrode resistance improved MOSFET with source and drain regions reduced in size beyond lithography limit and method for making the same'2001 6,218,242'Method for fabricating capacitors in semiconductor integrated circuit'2001 6,204,526'Method for fabricating a DRAM cell with a cup shaped storage node'2001 6,168,997'Method of forming poly gate and polycide gate with equal height'2001 6,140,178'Method to manufacture a capacitor with crown-shape using edge contact exposure'2000 6,136,644'Method of manufacturing a multi-pillared storage node using silylated photoresist'2000 6,114,202'Method of fabricating dynamic random access memory'2000 6,107,211'Split polysilicon process in CMOS image integrated circuit'2000 6,093,621'Method of forming shallow trench isolation'2000 6,090,700'Metallization method for forming interconnects in an integrated circuit'2000 6,092,000'Method for maximizing the throughput of a multiple-step workstation in a plant'2000 6,082,582'Automated carrier tube loading apparatus'2000 6,080,636'Photolitography alignment mark manufacuturing process in tungsten CMP metallization'2000 6,039,526'Automatic plug pulling machine for IC tubes'2000 5,972,793'Photolithography alignment mark manufacturing process in tungsten CMP metallization'1999 5,960,417'IC manufacturing costing control system and process'1999 5,950,170'Method to maximize capacity in IC fabrication'1999 5,940,298'Capacity loss control method for preventative maintenance in IC plant'1999 5,940,701'Method for forming a DRAM capacitor with four polysilicon pillars'1999 5,933,741'Method of making titanium silicide source/drains and tungsten silicide gate electrodes for field effect transistors'1999 5,926,710'Method for making dynamic random access memory cells using a novel stacked capacitor process'1999 5,915,177'EPROM manufacturing process having a floating gate with a large surface area'1999 5,915,181'Method for forming a deep submicron MOSFET device using a silicidation process'1999 5,907,775'Non-volatile memory device with high gate coupling ratio and manufacturing process therefor'1999 5,904,561'Method for forming a barrier metal film with conformal step coverage in a semiconductor intergrated circuit'1999 5,899,716'Oxygen ion implantation procedure to increase the surface area of an STC structure'1999 5,899,735'Method for making low-resistance contacts between polysilicon and metal silicide on semiconductor integrated circuits'1999 5,889,673'Manufacturing method and system for dynamic dispatching of integrated circuit wafer lots'1999 5,889,301'Semiconductor memory device having an E-shaped storage node'1999 5,888,863'Method to fabricate capacitors in memory circuits'1999 5,869,393'Method for fabricating multi-level interconnection'1999 5,861,343'Method for fabricating an aligned opening using a photoresist polymer as a side wall spacer'1999 5,854,105'Method for making dynamic random access memory cells having double-crown stacked capacitors with center posts'1998 5,843,821'Fabrication method for a cylindrical capacitor for a semiconductor device'1998 5,837,575'Method for forming a DRAM capacitor'1998 5,838,565'Manufacturing control method for IC plant batch sequential machine'1998 5,834,349'Method for fabricating memory cells using chemical mechanical polishing technology'1998 5,830,792'Method of making a stack capacitor in a DRAM cell'1998 5,824,582'Stack DRAM cell manufacturing process with high capacitance capacitor'1998 5,824,592'Method for forming a stacked capacitor of a DRAM cell'1998 5,824,581'Method for forming a DRAM capacitor with rounded horizontal fins'1998 5,821,139'Method for manufacturing a DRAM with increased electrode surface area'1998 5,821,151'Method of making a capacitor via chemical mechanical polish'1998 5,817,554'Use of a grated top surface topography for capacitor structures'1998 5,814,526'Method of forming a DRAM stacked capacitor with a two step ladder storage node'1998 5,811,339'Method of fabricating deep submicron MOSFET with narrow gate length using thermal oxidation of polysilicon'1998 5,807,775'Method for forming a double walled cylindrical capacitor for a DRAM'1998 5,804,480'method for forming a DRAM capacitor using HSG-Si technique and oxygen implant'1998 5,804,481'Increased capacitor surface area via use of an oxide formation and removal procedure'1998 5,801,082'Method for making improved shallow trench isolation with dielectric studs for semiconductor integrated circuits'1998 5,795,806'Method to increase the area of a stacked capacitor structure by creating a grated top surface bottom electrode'1998 5,795,822'Method for manufacturing an aligned opening in an integrated circuit'1998 5,792,688'Method to increase the surface area of a storage node electrode, of an STC structure, for DRAM devices, via formation of polysilicon columns'1998 5,792,693'Method for producing capacitors having increased surface area for dynamic random access memory'1998 5,793,077'DRAM trench capacitor with recessed pillar'1998 5,783,486'Bridge-free self aligned silicide process'1998 5,783,490'Photolithography alignment mark and manufacturing method'1998 5,766,993'Method of fabricating storage node electrode, for DRAM devices, using polymer spacers, to obtain polysilicon columns, with minimum spacing between columns'1998 5,766,994'Dynamic random access memory fabrication method having stacked capacitors with increased capacitance'1998 5,766,998'Method for fabricating narrow channel field effect transistors having titanium shallow junctions'1998

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1992–1998Patents assigned to IND TECH RES INST (16)· patent assignee history

1992–2021Based in Hsinchu, TW· patent location history

1995Based in Hsin-Tien, TW· patent location history

1996–2004Patents assigned to VANGUARD INT SEMICONDUCT CORP (179)· patent assignee history

1996–2017Based in Hsin Chu, TW· patent location history

2003–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (28)· patent assignee history

2008–2017Patents assigned to TSENG HORNG-HUEI (4)· patent assignee history

2016–2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (140)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
VANGUARD INT SEMICONDUCT CORP	179	1996–2004
TAIWAN SEMICONDUCTOR MFG CO LTD	140	2016–2021
TAIWAN SEMICONDUCTOR MFG	28	2003–2016
IND TECH RES INST	16	1992–1998
TSENG HORNG-HUEIself	4	2008–2017

Locations

Location	Patents	Span
Hsinchu, TW	356	1992–2021
Hsin Chu, TW	12	1996–2017
Hsin-Tien, TW	1	1995