Inventor

Anders Landin

Inventor
San Carlos, CA, US

Overview

20→
Patents
2005–2014
Patent span
Physics
Primary field (CPC G)

Patents· 20 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing95%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
PatentTitleYear
8,645,632'Speculative writestream transaction'20148,606,997'Cache hierarchy with bounds on levels accessed'20138,102,663'Proximity communication package for processor, cache and memory'20128,024,526'Multi-node system with global access states'20118,010,749'Multi-node computer system with proxy transaction to read data from a non-owning memory device'20117,945,738'Multi-node computer system employing a reporting mechanism for multi-node transactions'20117,765,381'Multi-node system in which home memory subsystem stores global to local address translation information for replicating nodes'20107,676,636'Method and apparatus for implementing virtual transactional memory using cache line marking'20107,606,978'Multi-node computer system implementing global access state dependent transactions'20097,529,893'Multi-node system with split ownership and access right coherence mechanism'20097,509,460'DRAM remote access cache in local memory in a distributed shared memory system'20097,480,770'Semi-blocking deterministic directory coherence'20097,412,567'Value-based memory coherence support'20087,376,793'Cache coherence protocol with speculative writestream'20087,363,462'Performing virtual to global address translation in processing subsystem'20087,360,029'Multi-node computer system in which interfaces provide data to satisfy coherency transactions when no owning device present in modified global access state node'20087,360,056'Multi-node system in which global address generated by processing subsystem includes global to local translation information'20087,120,756'Computer system including a promise array'20067,055,016'Computer system including a memory controller configured to perform pre-fetch operations'20066,973,547'Coherence message prediction mechanism and multiprocessing computer system employing the same'2005

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2005–2010Patents assigned to SUN MICROSYSTEMS INC (13)· patent assignee history
2005–2014Based in San Carlos, CA, US· patent location history
2010–2014Patents assigned to ORACLE AMERICA INC (7)· patent assignee history
2012–2014Patents assigned to LANDIN ANDERS (3)· patent assignee history
2012Patents assigned to CUNNINGHAM JOHN E (1)· patent assignee history
2013Patents assigned to CYPHER ROBERT (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SUN MICROSYSTEMS INC132005–2010
ORACLE AMERICA INC72010–2014
LANDIN ANDERSself32012–2014
CUNNINGHAM JOHN E12012
CYPHER ROBERT12013
Locations
LocationPatentsSpan
San Carlos, California, US202005–2014