Inventor
John T. O'Quin, II
Inventor
Austin, TX, US
Overview
Patents· 18 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing86%
H04LTransmission of digital information, e.g. telegraphic communication14%
PatentTitleYear
8,725,914'Message signaled interrupt management for a computer input/output fabric incorporating platform independent interrupt manager'20148,386,679'Dynamic allocation of a direct memory address window'20138,046,641'Managing paging I/O errors during hypervisor page fault processing'20117,886,139'Method to enable firmware to boot a system from an ISCSI device'20117,802,252'Method and apparatus for selecting the architecture level to which a processor appears to conform'20107,734,818'Method to add IPV6 and DHCP support to the network support package'20107,734,743'Method to enable infiniband network bootstrap'20107,689,679'Method to enable infiniband network bootstrap'20106,516,429'Method and apparatus for run-time deconfiguration of a processor in a symmetrical multi-processing system'2003RE036462'Method to control paging subsystem processing in virtual memory data processing system during execution of critical code sections'19995,555,400'Method and apparatus for internal cache copy'19965,418,927'I/O cache controller containing a buffer memory partitioned into lines accessible by corresponding I/O devices and a directory to track the lines'19955,293,622'Computer system with input/output cache'19945,161,219'Computer system with input/output cache'19925,129,088'Data processing method to create virtual disks from non-contiguous groups of logically contiguous addressable blocks of direct access storage device'19924,730,249'Method to operate on large segments of data in a virtual memory data processing system'19884,718,008'Method to control paging subsystem processing in a virtual memory data processing system during execution of critical code sections'19884,463,418'Error correction from remote data processor by communication and reconstruction of processor status storage disk'1984Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1984–2014Patents assigned to IBM (18)· patent assignee history
1984–2014Based in Austin, TX, US· patent location history
2013Patents assigned to NORDSTROM GREGORY M (1)· patent assignee history
2014Patents assigned to BROWNLOW SEAN THOMAS (1)· patent assignee history
2014Patents assigned to LINDEMAN JAMES ARTHUR (1)· patent assignee history
2014Patents assigned to NORDSTROM GREGORY MICHAEL (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 18 | 1984–2014 |
| BROWNLOW SEAN THOMAS | 1 | 2014 |
| LINDEMAN JAMES ARTHUR | 1 | 2014 |
| NORDSTROM GREGORY M | 1 | 2013 |
| NORDSTROM GREGORY MICHAEL | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Austin, Texas, US | 18 | 1984–2014 |