Inventor

David G. Reed

Inventor
Saratoga, CA, US

Overview

68→
Patents
1983–2020
Patent span
Physics
Primary field (CPC G)

Patents· 68 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing36%
G09GArrangements or circuits for control of indicating devices using static means to present variable information13%
G11CStatic stores8%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use6%
G06TImage data processing or generation, in general5%
A61HPhysical therapy apparatus, e.g. devices for locating or stimulating reflex points in the body4%
A45BWalking sticks3%
A63BApparatus for physical training, gymnastics, swimming, climbing, or fencing3%
H04NPictorial communication, e.g. television3%
LOC033%
PatentTitleYear
10,783,950Memory management systems and methods using a management communication bus202010,528,423Memory management systems and methods202010,445,177Controller-based memory scrub for DRAMs with internal error-correcting code (ECC) bits contemporaneously during auto refresh or by using masked write commands201910,049,006Controller-based memory scrub for DRAMs with internal error-correcting code (ECC) bits contemporaneously during auto refresh or by using masked write commands201810,002,586Compression of display data stored locally on a GPU20189,880,900'Method for scrubbing and correcting DRAM memory data with internal error-correcting code (ECC) bits contemporaneously during self-refresh state'20189,823,964'Method for memory scrub of DRAM with internal error correcting code (ECC) bits during either memory activate and/or precharge operation'20179,262,837'PCIE clock rate stepping for graphics and platform processors'20168,738,945'Using non-lossless compression to save power'20148,736,617'Hybrid graphic display'20148,692,837'Screen compression for mobile applications'20148,635,480'Method and apparatus for controlling power to a processing unit'20148,532,098'System and method for virtual channel communication'20138,473,750'Chipset security offload engine'20138,427,496'Method and system for implementing compression across a graphics bus interconnect'20138,284,620'Memory controller-adaptive 1T/2T timing control'20128,120,614'Screen compression for mobile applications'20128,098,254'Power savings in a computing device during video playback'20128,069,355'Data path controller with integrated power management to manage power consumption of a computing device and its components'20117,925,907'Using non-lossless compression to save power'20117,920,701'System and method for digital content protection'20117,882,296'Deadlock avoidance in a bus fabric'20117,876,327'Power savings in a computing device during video playback'20117,849,342'Method and system for implementing generalized system stutter'20107,813,204'Method and system for memory thermal load sharing using memory on die termination'20107,746,349'Method and apparatus for display of data'20107,688,325'Screen compression for mobile applications'20107,673,641'Rolling/braking cane'20107,584,321'Memory address and datapath multiplexing'20097,571,296'Memory controller-adaptive 1T/2T timing control'20097,546,483'Offloading RAID functions to a graphics coprocessor'20097,509,966'Step-up device'20097,495,985'Method and system for memory thermal load sharing using memory on die termination'20097,487,371'Data path controller with integrated power management to manage power consumption of a computing device and its components'20097,478,189'Deadlock avoidance in a bus fabric'20097,469,366'Measurement of health statistics for a high-speed interface'20087,418,537'Deadlock avoidance in a bus fabric'20087,377,285'Walker'20087,315,912'Deadlock avoidance in a bus fabric'20087,289,125'Graphics device clustering with PCI-express'20077,287,145'System, apparatus and method for reclaiming memory holes in memory composed of identically-sized memory devices'20077,275,143'System, apparatus and method for avoiding page conflicts by characterizing addresses in parallel with translations of memory addresses'20077,261,114'Rolling/braking cane'20077,240,179'System, apparatus and method for reclaiming memory holes in memory composed of arbitrarily-sized memory devices'2007D0539193'Base for physical assistance devices'20077,191,088'Method and system for memory temperature detection and thermal load management'2007D0528780'Step-up cane'20067,081,896'Memory request timing randomizer'20067,060,182'Hand-held pool cleaner'2006D0522232'Base for a cane'20067,054,987'Apparatus, system, and method for avoiding data writes that stall transactions in a bus interface'2006D0521720'Cane'2006D0518253'Hand-held pool cleaner'20066,929,142'Removable hatch cover for an internal floating roof manway'20056,923,807'Helical device and method for aiding the ablation and assessment of tissue'2005D0494109'Walker'20046,542,971'Memory access system and method employing an auxiliary buffer'20036,288,418'Multiuse input/output connector arrangement for graphics accelerator integrated circuit'2001D0400869'Portable computer'19985,526,025'Method and apparatus for performing run length tagging for increased bandwidth in dynamic data repetitive memory systems'19965,214,439'Drum-deployable multibay antenna'19935,196,858'Deployable S-shaped antenna element'19934,633,387'Load balancing in a multiunit system'19864,583,166'Roll mode for cached data storage'19864,533,995'Method and system for handling sequential data in a hierarchical store'19854,430,701'Method and apparatus for a hierarchical paging storage system'19844,420,807'Selectively holding data in a buffer for defective backing store tracks'19834,403,288'Methods and apparatus for resetting peripheral devices addressable as a plurality of logical devices'1983

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1983–1986Patents assigned to IBM (6)· patent assignee history
1983–1986Based in Tucson, AZ, US· patent location history
1983–1985Based in Pima, AZ, US· patent location history
1993–2010Based in Langhorne, PA, US· patent location history
2001–2020Patents assigned to NVIDIA CORP (45)· patent assignee history
2001–2019Based in Santa Clara, CA, US· patent location history
2003–2020Based in Saratoga, CA, US· patent location history
2006–2010Patents assigned to FULL LIFE PRODUCTS LLC (7)· patent assignee history
2008–2018Patents assigned to REED DAVID G (12)· patent assignee history
2011–2018Patents assigned to SIMERAL BRAD W (5)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
NVIDIA CORP452001–2020
REED DAVID Gself122008–2018
FULL LIFE PRODUCTS LLC72006–2010
IBM61983–1986
SIMERAL BRAD W52011–2018
Locations
LocationPatentsSpan
Saratoga, California, US432003–2020
Langhorne, Pennsylvania, US151993–2010
Tucson, AZ, US31983–1986
Pima, AZ, US31983–1985
Santa Clara, California, US22001–2019