Inventor

Susan M. Eickhoff

Inventor
Hopewell Junction, NY, US

Overview

15→
Patents
2014–2021
Patent span
Physics
Primary field (CPC G)

Patents· 15 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing50%
G11CStatic stores23%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses12%
H04LTransmission of digital information, e.g. telegraphic communication8%
G01RMeasuring electric variables4%
H03MCoding4%
PatentTitleYear
11,099,601Reducing latency of memory read operations returning data on a read data path across multiple clock boundaries, to a host implementing a high speed serial interface202110,976,939Address/command chip synchronized autonomous data chip address sequencer for a distributed buffer memory system202110,771,068Reducing chip latency at a clock boundary by reference clock phase adjustment202010,747,442Host controlled data chip address sequencing for a distributed memory buffer system202010,740,031Interface scheduler for a distributed memory system202010,698,440Reducing latency of memory read operations returning data on a read data path across multiple clock boundaries, to a host implementing a high speed serial interface202010,642,535Register access in a distributed memory buffer system202010,534,555Host synchronized autonomous data chip address sequencer for a distributed buffer memory system202010,489,069Address/command chip synchronized autonomous data chip address sequencer for a distributed buffer memory system201910,393,805JTAG support over a broadcast bus in a distributed memory buffer system201910,395,698Address/command chip controlled data chip address sequencing for a distributed memory buffer system201910,353,606Partial data replay in a distributed memory buffer system201910,162,773Double data rate (DDR) memory read latency reduction201810,078,461Partial data replay in a distributed memory buffer system20188,898,504'Parallel data communications mechanism having reduced power continuously calibrated lines'2014

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2014–2021Patents assigned to IBM (15)· patent assignee history
2014Patents assigned to BAUMGARTNER STEVEN J (1)· patent assignee history
2014Patents assigned to EICKHOFF SUSAN M (1)· patent assignee history
2014Patents assigned to FERRAIOLO FRANK D (1)· patent assignee history
2014Patents assigned to SPEAR MICHAEL B (1)· patent assignee history
2014Based in Hyde Park, NY, US· patent location history
2018–2021Based in Hopewell Junction, NY, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
IBM152014–2021
BAUMGARTNER STEVEN J12014
EICKHOFF SUSAN Mself12014
FERRAIOLO FRANK D12014
SPEAR MICHAEL B12014
Locations
LocationPatentsSpan
Hopewell Junction, New York, US142018–2021
Hyde Park, New York, US12014