Inventor
Soo-Ho Shin
Inventor
Gyeonggi-do, KR
Overview
Patents· 28 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices34%
H10BElectronic memory devices23%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1017%
H01LSemiconductor devices11%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
G11CStatic stores3%
PatentTitleYear
9,966,267Semiconductor device having vertical channels and method of manufacturing the same20189,536,868'Semiconductor device'20179,496,336'Semiconductor device having vertical channels and method of manufacturing the same'20169,299,827'Semiconductor integrated circuit devices including gates having connection lines thereon'20169,177,891'Semiconductor device including contact pads'20159,099,325'Semiconductor device having vertical channels and method of manufacturing the same'20158,873,277'Semiconductor memory device having balancing capacitors'20148,872,262'Semiconductor integrated circuit devices including gates having connection lines thereon'20148,648,423'Semiconductor devices including buried-channel-array transistors'20148,637,934'Semiconductor device having vertical channels and method of manufacturing the same'20148,563,373'Semiconductor device having vertical channels and method of manufacturing the same'20138,310,859'Semiconductor memory device having balancing capacitors'20128,183,113'Methods of forming recessed gate structures including blocking members, and methods of forming semiconductor devices having the recessed gate structures'20127,767,531'Method of forming transistor having channel region at sidewall of channel portion hole'20107,749,846'Method of forming contact structure and method of fabricating semiconductor device using the same'20107,745,876'Semiconductor integrated circuit devices including gate patterns having step difference therebetween and a connection line disposed between the gate patterns and methods of fabricating the same'20107,670,910'Method of forming self-aligned inner gate recess channel transistor'20107,629,215'Semiconductor device and method of manufacturing the same'20097,598,571'Semiconductor device having vertical channels and method of manufacturing the same'20097,595,529'Semiconductor integrated circuit devices having upper pattern aligned with lower pattern molded by semiconductor substrate and methods of forming the same'20097,531,413'Method of forming transistor having channel region at sidewall of channel portion hole'20097,413,943'Method of fabricating gate of fin type transistor'20087,300,888'Methods of manufacturing integrated circuit devices having an encapsulated insulation layer'20077,279,741'Semiconductor device with increased effective channel length and method of manufacturing the same'20077,154,144'Self-aligned inner gate recess channel transistor and method of forming the same'20066,720,276'Methods of forming spin on glass layers by curing remaining portions thereof'20046,656,791'Semiconductor integrated circuit with resistor and method for fabricating thereof'20036,531,758'Semiconductor integrated circuit with resistor and method for fabricating thereof'2003Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2003–2018Patents assigned to SAMSUNG ELECTRONICS CO LTD (28)· patent assignee history
2003–2007Based in Seoul, KR· patent location history
2006–2010Based in Yongin, KR· patent location history
2008–2013Based in Gyeonggi-do, KR· patent location history
2009–2014Based in Yongin-si, KR· patent location history
2012–2014Patents assigned to SHIN SOO-HO (6)· patent assignee history
2012–2014Patents assigned to CHUNG TAE-YOUNG (3)· patent assignee history
2012–2014Patents assigned to KIM YONG-SUNG (3)· patent assignee history
2012Patents assigned to BYUN YOUNG-YONG (1)· patent assignee history
2014–2018Based in Hwaseong-si, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 28 | 2003–2018 |
| SHIN SOO-HOself | 6 | 2012–2014 |
| CHUNG TAE-YOUNG | 3 | 2012–2014 |
| KIM YONG-SUNG | 3 | 2012–2014 |
| BYUN YOUNG-YONG | 1 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Gyeonggi-do, KR | 9 | 2008–2013 |
| Hwaseong-si, KR | 8 | 2014–2018 |
| Yongin-si, KR | 4 | 2009–2014 |
| Seoul, KR | 4 | 2003–2007 |
| Yongin, KR | 2 | 2006–2010 |