Inventor
Shigeru Shiratake
Inventor
Tokyo, JP
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices30%
H10BElectronic memory devices28%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1024%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h107%
H01JElectric discharge tubes or discharge lamps4%
C23CCoating metallic material2%
G21KHandling of particles or ionising radiation not otherwise provided for2%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
PatentTitleYear
8,669,172'Method of manufacturing nonvolatile semiconductor device'20148,211,777'Method of manufacturing nonvolatile semiconductor device'20128,129,770'Semiconductor device and manufacturing method thereof'20128,105,907'Manufacturing method of semiconductor memory device'20127,935,595'Method for manufacturing semiconductor device'20117,709,324'Method for forming a gate within a trench including the use of a protective film'20107,705,392'Nonvolatile semiconductor device and method of manufacturing nonvolatile semiconductor device'20107,674,673'Semiconductor device and manufacturing method thereof'20107,339,221'Semiconductor device having a self-aligned contact structure'20086,864,546'Semiconductor device having memory cell portion and manufacturing method thereof'20056,812,536'MOSFET with graded gate oxide layer'20046,765,251'Semiconductor device having interconnection structure'20046,743,692'Semiconductor device manufacturing method'20046,667,505'Semiconductor device having a plurality of capacitors aligned at regular intervals'20036,531,757'Semiconductor device fuse box with fuses of uniform depth'20036,163,062'Semiconductor device having a metallic fuse member and cutting method thereof with laser light'20006,033,971'Semiconductor device having an element isolating oxide film and method of manufacturing the same'20005,831,323'Semiconductor device having an element isolating oxide film and method of manufacturing the same'19985,801,427'Semiconductor device having a polycide structure'19985,623,154'Semiconductor device having triple diffusion'19975,354,986'Ion implantation apparatus'19945,293,508'Ion implanter and controlling method therefor'1994Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1994–2003Patents assigned to MITSUBISHI ELECTRIC CORP (9)· patent assignee history
1994Based in Itami, JP· patent location history
1997–2012Based in Hyogo, JP· patent location history
2000–2014Based in Tokyo, JP· patent location history
2004–2010Patents assigned to RENESAS TECH CORP (7)· patent assignee history
2010–2012Patents assigned to ELPIDA MEMORY INC (3)· patent assignee history
2012–2014Patents assigned to SHIRATAKE SHIGERU (4)· patent assignee history
2012–2014Patents assigned to RENESAS ELECTRONICS CORP (3)· patent assignee history
2012Based in Chuo-ku, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MITSUBISHI ELECTRIC CORP | 9 | 1994–2003 |
| RENESAS TECH CORP | 7 | 2004–2010 |
| SHIRATAKE SHIGERUself | 4 | 2012–2014 |
| ELPIDA MEMORY INC | 3 | 2010–2012 |
| RENESAS ELECTRONICS CORP | 3 | 2012–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tokyo, JP | 10 | 2000–2014 |
| Hyogo, JP | 9 | 1997–2012 |
| Itami, JP | 2 | 1994 |
| Chuo-ku, JP | 1 | 2012 |