Inventor

Timothy R. Paaske

Inventor
Cupertino, CA, US

Overview

32→
Patents
2007–2021
Patent span
Physics
Primary field (CPC G)

Patents· 32 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing49%
H04LTransmission of digital information, e.g. telegraphic communication22%
G09CCiphering or deciphering apparatus for cryptographic or other purposes involving the need for secrecy10%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use10%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications5%
H03KPulse technique3%
PatentTitleYear
10,915,402Software fault monitoring202110,867,031Marking valid return targets202010,853,504Secure public key acceleration202010,747,295Control of a computer system in a power-down state202010,713,351Authentication and control of encryption keys202010,551,907System power management using communication bus protocols202010,536,271Silicon key attestation202010,521,596Secure public key acceleration201910,417,429Method and apparatus for boot variable protection201910,243,990Systems and methods for detecting replay attacks on security space201910,114,956Secure public key acceleration201810,078,749Authentication and control of encryption keys20189,959,124Secure bypass of low-level configuration in reconfiguration of a computing system20189,892,267'Secure public key acceleration'20189,747,435'Authentication and control of encryption keys'20179,740,645'Reducing latency in a peripheral component interconnect express link'20179,647,653'Method for reduced power clock frequency monitoring'20179,547,778'Secure public key acceleration'20179,495,318'Synchronizing transactions for a single master over multiple busses'20169,395,795'System power management using communication bus protocols'20169,262,362'Multi-cycle delay for communication buses'20169,256,551'Embedded encryption/secure memory management unit for peripheral interface controller'20169,202,061'Security enclave processor boot control'20159,135,431'Harmonic detector of critical path monitors'20159,081,556'Power on reset detector'20159,047,471'Security enclave processor boot control'20159,015,396'Reducing latency in a peripheral component interconnect express link'20158,433,956'Instruction sequence verification to protect secured data'20137,774,619'Secure code execution using external memory'20107,454,610'Security association updates in a packet load-balanced system'20087,325,165'Instruction sequence verification to protect secured data'20087,290,134'Encapsulation mechanism for packet processing'2007

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2007–2013Patents assigned to BROADCOM CORP (5)· patent assignee history
2007–2020Based in San Jose, CA, US· patent location history
2013–2015Patents assigned to PAASKE TIMOTHY R (2)· patent assignee history
2015–2021Patents assigned to APPLE INC (27)· patent assignee history
2015Patents assigned to MACHNICKI ERIK P (1)· patent assignee history
2015–2021Based in Cupertino, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
APPLE INC272015–2021
BROADCOM CORP52007–2013
PAASKE TIMOTHY Rself22013–2015
MACHNICKI ERIK P12015
Locations
LocationPatentsSpan
Cupertino, California, US242015–2021
San Jose, California, US82007–2020