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Inventor

Jonggook Kim

Inventor
San Jose, CA, US

Overview

4→
Patents
2005–2008
Patent span
Physics
Primary field (CPC G)

Patents· 4 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G01Rprimary
G01RMeasuring electric variables57%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1029%
G01KMeasuring temperature14%
PatentTitleYear
7,422,366'Current mirror methodology quantifying time dependent thermal instability accurately in SOI BJT circuitry'20087,390,682'Method for testing metal-insulator-metal capacitor structures under high temperature at wafer level'20087,170,090'Method and structure for testing metal-insulator-metal capacitor structures under high temperature at wafer level'20076,931,345'Method for quantifying safe operating area for bipolar junction transistor'2005

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2005–2008Patents assigned to NAT SEMICONDUCTOR CORP (4)· patent assignee history
2005–2008Based in San Jose, CA, US· patent location history
2007–2008Based in Cupertino, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
NAT SEMICONDUCTOR CORP42005–2008
Locations
LocationPatentsSpan
San Jose, California, US22005–2008
Cupertino, California, US22007–2008