Inventor
EREZ IZENBERG
Inventor
IL
Overview
Patents· 36 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing52%
H04LTransmission of digital information, e.g. telegraphic communication27%
G11CStatic stores7%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use5%
G09CCiphering or deciphering apparatus for cryptographic or other purposes involving the need for secrecy3%
H04JMultiplex communication3%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses2%
H03MCoding2%
PatentTitleYear
12,411,799Transaction based remote direct memory access202512,393,548Flexible remote direct memory access202512,393,258Wake-up management circuit for multiple processors202512,373,235Physical hardware clock virtualization202512,362,991FPGA-enabled compute instances202512,321,301Low-latency packet processing for network device202512,204,481Configurable logic platform202512,175,285Processing unit selection mechanism202412,069,154Configurable parser and a method for parsing information units202412,056,067Input/output (I/O) register reflected in CPU memory202411,989,154Hybrid remote direct memory access202411,967,964Clock synchronization in a network using a distributed pulse signal202411,960,392Configurable routing in a multi-chip system202411,892,967Flexible remote direct memory access202411,880,327Non-coherent and coherent connections in a multi-chip system202411,870,761Hardware security accelerator202411,860,810Configurable logic platform202411,853,253Transaction based remote direct memory access202311,855,757Highly accurate time information in hosted machine instances using dedicated timing network202311,836,103Traffic separation in a multi-chip system202311,811,637Packet timestamp format manipulation202311,792,299Distribution of messages with guaranteed or synchronized time of delivery202311,677,866Configurable parser and a method for parsing information units202311,606,104Data integrity protection202311,483,296Hardware security accelerator202211,474,966Configurable logic platform202211,467,998Low-latency packet processing for network device202211,445,051Configurable parser and a method for parsing information units202211,436,183Flexible remote direct memory access202211,405,324Packet serial number validation202211,386,008False hit detection in ternary content-addressable memory202211,294,841Dynamically configurable pipeline202211,275,503Controlling access to previously-stored logic in a reconfigurable logic device202211,182,320Configurable logic platform with multiple reconfigurable regions202111,163,719Hybrid remote direct memory access202111,157,452In-band de-duplication2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2025Patents assigned to AMAZON TECH INC (36)· patent assignee history
2021–2025Based in IL· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| AMAZON TECH INC | 36 | 2021–2025 |
Locations
| Location | Patents | Span |
|---|---|---|
| IL | 36 | 2021–2025 |