Inventor

Romi Mayder

Inventor
San Jose, CA, US

Overview

19→
Patents
2003–2016
Patent span
Physics
Primary field (CPC G)

Patents· 19 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G01Rprimary
G01RMeasuring electric variables47%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%
H05KPrinted circuits9%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h109%
Y10TTechnical subjects covered by former us classification9%
G11CStatic stores6%
G05FSystems for regulating electric or magnetic variables3%
H10DInorganic electric semiconductor devices3%
PatentTitleYear
9,377,802'Dynamic configuration of equivalent series resistance'20168,925,193'Methods for fabricating circuit boards'20158,710,623'Integrated circuit having a discrete capacitor mounted on a semiconductor die'20148,410,579'Power distribution network'20138,305,098'Element usable with the method, and a standalone probe card tester formable using the method'20128,269,515'High impedance, high parallelism, high temperature memory test system architecture'20127,859,277'Apparatus, systems and methods for processing signals between a tester and a plurality of devices under test at high temperatures and with single touchdown of a probe array'20107,768,278'High impedance, high parallelism, high temperature memory test system architecture'20107,750,650'Solid high aspect ratio via hole used for burn-in boards, wafer sort probe cards, and package test load boards with electronic circuitry'20107,541,824'Forced air cooling of components on a probecard'20097,501,844'Liquid cooled DUT card interface for wafer sort probing'20097,502,974'Method and apparatus for determining which timing sets to pre-load into the pin electronics of a circuit test system, and for pre-loading or storing said timing sets'20097,459,921'Method and apparatus for a paddle board probe card'20087,460,371'Wiffle tree components, cooling systems, and methods of attaching a printed circuit board to a heat sink'20087,348,791'High voltage, high frequency, high reliability, high density, high temperature automated test equipment (ATE) switch design'20087,323,897'Mock wafer, system calibrated using mock wafer, and method for calibrating automated test equipment'20087,147,499'Zero insertion force printed circuit assembly connector system and method'20067,106,081'Parallel calibration system for a test device'20066,570,397'Timing calibration and timing calibration verification of electronic circuit testers'2003

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2003–2016Based in San Jose, CA, US· patent location history
2008–2010Patents assigned to VERIGY PTE LTD SINGAPORE (8)· patent assignee history
2012–2015Patents assigned to ADVANTEST SINGAPORE PTE LTD (3)· patent assignee history
2012–2015Patents assigned to MAYDER ROMI O (3)· patent assignee history
2013–2016Patents assigned to MAYDER ROMI (3)· patent assignee history
2013–2016Patents assigned to XILINX INC (3)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
VERIGY PTE LTD SINGAPORE82008–2010
ADVANTEST SINGAPORE PTE LTD32012–2015
MAYDER ROMIself32013–2016
MAYDER ROMI Oself32012–2015
XILINX INC32013–2016
Locations
LocationPatentsSpan
San Jose, California, US192003–2016