Inventor
Andreas H. A. Arp
Inventor
Nufringen, DE
Overview
Patents· 38 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique44%
G06FElectric digital data processing38%
G01RMeasuring electric variables9%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses5%
G04FTime-interval measuring3%
G11CStatic stores2%
PatentTitleYear
11,113,446Yield improving leaf cells optimization for semiconductor netlists202111,088,684Calibrating internal pulses in an integrated circuit202111,082,034Cycle accurate skew adjust202111,043,946Continuous skew adjust202111,025,239Static compensation of an active clock edge shift for a duty cycle correction circuit202111,022,998Optimally driving non-uniform clock mesh loads202110,892,744Correcting duty cycle and compensating for active clock edge shift202110,804,889Double compression avoidance202010,756,714Skew control202010,684,642Adaptive clock mesh wiring202010,651,834Method and apparatus for clock skew control with low jitter in an integrated circuit202010,622,981Static compensation of an active clock edge shift for a duty cycle correction circuit202010,594,307Skew sensor with enhanced reliability202010,581,417Skew sensor with enhanced reliability202010,564,664Integrated skew control202010,546,094Generating a layout for an integrated circuit202010,469,063Method and apparatus for clock skew control with low jitter in an integrated circuit201910,361,689Static compensation of an active clock edge shift for a duty cycle correction circuit201910,355,683Correcting duty cycle and compensating for active clock edge shift201910,348,279Skew control201910,348,278Method and apparatus for clock skew control with low jitter in an integrated circuit201910,326,435Dynamic control of edge shift for duty cycle correction201910,312,892On-chip waveform measurement201910,298,217Double compression avoidance201910,263,606On-chip waveform measurement201910,158,351Skew control apparatus and algorithm using a low pass filter201810,148,259Skew sensor with enhanced reliability201810,110,205Method and apparatus for clock skew control with low jitter in an integrated circuit201810,063,222Dynamic control of edge shift for duty cycle correction20189,953,124Generating a layout for an integrated circuit20189,916,409'Generating a layout for an integrated circuit'20189,754,063'Reducing dynamic clock skew and/or slew in an electronic circuit'20179,306,547'Duty cycle adjustment with error resiliency'20168,937,494'Method and apparatus for detecting rising and falling transitions of internal signals of an integrated circuit'20158,912,824'Method and apparatus for detecting rising and falling transitions of internal signals of an integrated circuit'20148,566,771'Automation of interconnect and routing customization'20137,996,808'Computer readable medium, system and associated method for designing integrated circuits with loop insertions'20117,526,743'Method for routing data paths in a semiconductor chip with a plurality of layers'2009Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2009–2021Patents assigned to IBM (38)· patent assignee history
2009Based in Schoenaich, DE· patent location history
2011–2021Based in Nufringen, DE· patent location history
2017Based in Boeblingen, DE· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 38 | 2009–2021 |
Locations
| Location | Patents | Span |
|---|---|---|
| Nufringen, DE | 36 | 2011–2021 |
| Boeblingen, DE | 1 | 2017 |
| Schoenaich, DE | 1 | 2009 |