Inventor
Bongsub Lee
Inventor
Mountain View, CA, US
Overview
Patents· 8 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices38%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1038%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1024%
PatentTitleYear
10,600,761Nanoscale interconnect array for stacked dies202010,304,803Nanoscale interconnect array for stacked dies201910,008,469Wafer-level packaging using wire bond wires in place of a redistribution layer20189,859,234'Methods and structures to repair device warpage'20189,847,238Fan-out wafer-level packaging using metal foil lamination20179,646,946'Fan-out wafer-level packaging using metal foil lamination'20179,543,277'Wafer level packages with mechanically decoupled fan-in and fan-out areas'20179,502,372'Wafer-level packaging using wire bond wires in place of a redistribution layer'2016Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2016–2020Patents assigned to INVENSAS CORP (8)· patent assignee history
2016–2019Based in Mountain View, CA, US· patent location history
2020Based in Santa Clara, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INVENSAS CORP | 8 | 2016–2020 |
Locations
| Location | Patents | Span |
|---|---|---|
| Mountain View, California, US | 7 | 2016–2019 |
| Santa Clara, California, US | 1 | 2020 |