Inventor
Yoshimitsu Yamauchi
Inventor
Nabari, JP
Overview
Patents· 72 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Bprimary
H10BElectronic memory devices28%
G11CStatic stores27%
H10DInorganic electric semiconductor devices16%
G09GArrangements or circuits for control of indicating devices using static means to present variable information13%
H01LSemiconductor devices4%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests4%
G02FOptical devices or arrangements for the control of light by modification of the optical properties of the media of the elements involved therein4%
H10KOrganic electric solid-state devices1%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h101%
G06FElectric digital data processing1%
PatentTitleYear
9,583,057'Pixel circuit and display device'20179,460,660'Pixel circuit and display device'20169,305,492'Display device and method for driving the same'20169,214,469'Semiconductor memory circuit and device'20159,208,826'Semiconductor storage device with two control lines'20159,159,738'Semiconductor memory device'20158,947,418'Display device'20158,941,628'Pixel circuit and display device'20158,866,802'Pixel circuit and display device'20148,854,346'Pixel circuit and display device'20148,847,866'Pixel circuit and display device'20148,836,688'Display device'20148,786,531'Pixel circuit and display device'20148,767,136'Display device'20148,743,033'Pixel circuit and display device'20148,704,809'Pixel circuit and display device'20148,654,291'Pixel circuit and display device'20148,610,197'Nonvolatile memory having gate electrode and charge storage layer formed respectively over opposite surfaces of semiconductor layer'20138,390,052'Nonvolatile semiconductor memory device'20138,384,835'Pixel circuit and display device'20138,339,531'Display device'20128,310,638'Pixel circuit and display apparatus'20127,728,378'Nonvolatile semiconductor memory device, manufacturing method thereof and method of programming information into the memory device'20107,630,243'Semiconductor memory device'20097,612,397'Memory cell having first and second capacitors with electrodes acting as control gates for nonvolatile memory transistors'20097,326,991'Nonvolatile semiconductor memory and method of operating the same'20087,283,391'Semiconductor memory device'20077,276,761'Semiconductor memory device having insulating film of varying thickness over bit lines'20077,224,611'Virtual ground line type memory device with high speed readout circuit'20077,187,029'Nonvolatile semiconductor memory device with floating gate and two control gates'20077,151,693'Method of writing data to a non-volatile semiconductor memory'20067,057,944'Semiconductor readout circuit'20067,002,204'Non-volatile semiconductor memory and process of fabricating the same'20066,952,031'Nonvolatile semiconductor memory and method of operating the same'20056,894,913'Non-volatile semiconductor memory and method of operating the same'20056,873,007'Nonvolatile semiconductor memory device and process for producing the same'20056,643,175'Nonvolatile semiconductor storage device and test method therefor'20036,531,732'Nonvolatile semiconductor memory device, process of manufacturing the same and method of operating the same'20036,512,692'Nonvolatile semiconductor storage device and test method therefor'20036,493,264'Nonvolatile semiconductor memory, method of reading from and writing to the same and method of manufacturing the same'20026,438,035'Nonvolatile semiconductor storage device'20026,392,927'Cell array, operating method of the same and manufacturing method of the same'2002RE037199'Method of making nonvolatile semiconductor memory'20016,101,128'Nonvolatile semiconductor memory and driving method and fabrication method of the same'20006,009,011'Non-volatile memory and method for operating the same'19995,962,889'Nonvolatile semiconductor memory with a floating gate that has a bottom surface that is smaller than the upper surface'19995,877,054'Method of making nonvolatile semiconductor memory'19995,606,193'DRAM and MROM cells with similar structure'19975,510,284'Method for manufacturing an asymetric non-volatile memory'19965,424,232'Method for manufacturing a non-volatile memory having a floating gate oxide type fet provided with a tunnel oxide film'19955,422,297'Method for forming a semiconductor device'19955,414,286'Nonvolatile memory, method of fabricating the same, and method of reading information from the same'19955,411,904'Process for fabricating nonvolatile random access memory having a tunnel oxide film'19955,401,993'Non-volatile memory'19955,400,280'Nonvolatile memory and a method of writing data thereto'19955,338,952'Non-volatile memory'19945,331,181'Non-volatile semiconductor memory'19945,303,186'Semiconductor memory and process for manufacturing the same'19945,290,721'Method of making a stacked semiconductor nonvolatile memory device'19945,282,159'Semiconductor memory with increased capacitive storage capabilities and reduced size'19945,268,585'Non-volatile memory and method of manufacturing the same'19935,262,986'Semiconductor memory device with volatile memory and non-volatile memory in latched arrangement'19935,251,171'Method of operating a semiconductor memory device'19935,181,188'Semiconductor memory device'19935,172,199'Compact nonvolatile semiconductor memory device using stacked active and passive elements'19925,140,552'Semiconductor memory device having a volatile memory device and a non-volatile memory device'19925,139,964'Method for forming isolation region of semiconductor device'19925,108,783'Process for producing semiconductor devices'19925,075,888'Semiconductor memory device having a volatile memory device and a non-volatile memory device'19915,065,201'Semiconductor memory device'19915,063,425'Semiconductor memory device with capacitor over non-volatile memory cell gate structure'19915,043,946'Semiconductor memory device'1991Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1991–2017Patents assigned to SHARP KK (72)· patent assignee history
1991–1995Based in Nara, JP· patent location history
1992–1995Based in Yamatokoriyama, JP· patent location history
1995–2010Based in Nabari, JP· patent location history
2012–2015Patents assigned to YAMAUCHI YOSHIMITSU (16)· patent assignee history
2012–2015Patents assigned to UEDA NAOKI (5)· patent assignee history
2012–2015Patents assigned to NAKANO FUMIKI (3)· patent assignee history
2012–2017Based in Osaka, JP· patent location history
2013Based in Osaka-shi, JP· patent location history
2015Patents assigned to SHARP KABUSHIKI KAISHA OSAKA (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SHARP KK | 72 | 1991–2017 |
| YAMAUCHI YOSHIMITSUself | 16 | 2012–2015 |
| UEDA NAOKI | 5 | 2012–2015 |
| NAKANO FUMIKI | 3 | 2012–2015 |
| SHARP KABUSHIKI KAISHA OSAKA | 1 | 2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Nabari, JP | 28 | 1995–2010 |
| Osaka, JP | 21 | 2012–2017 |
| Yamatokoriyama, JP | 11 | 1992–1995 |
| Nara, JP | 10 | 1991–1995 |
| Osaka-shi, JP | 1 | 2013 |