Inventor
Ajay P. Giri
Inventor
Poughkeepsie, NY, US
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1024%
H05KPrinted circuits23%
Y10TTechnical subjects covered by former us classification17%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests11%
C25DProcesses for the electrolytic or electrophoretic production of coatings6%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h106%
C04BLime, magnesia3%
F28FDetails of heat-exchange and heat-transfer apparatus, of general application3%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices3%
Y02PClimate change mitigation technologies in the production or processing of goods3%
PatentTitleYear
8,314,500'Interconnections for flip-chip using lead-free solders and having improved reaction barrier layers'20128,003,512'Structure of UBM and solder bumps and methods of fabrication'20117,932,169'Interconnection for flip-chip using lead-free solders and having improved reaction barrier layers'20116,973,715'Method of forming a multichip module having chips on two sides'20056,896,784'Method for controlling local current to achieve uniform plating thickness'20056,890,413'Method and apparatus for controlling local current to achieve uniform plating thickness'20056,765,152'Multichip module having chips on two sides'20046,678,949'Process for forming a multi-level thin-film electronic packaging structure'20046,451,155'Method using a thin adhesion promoting layer for bonding silicone elastomeric material to nickel and use thereof in making a heat sink assembly'20026,291,272'Structure and process for making substrate packages for high frequency application'20016,281,452'Multi-level thin-film electronic packaging structure and related method'20016,261,467'Direct deposit thin film single/multi chip module'20016,235,412'Corrosion-resistant terminal metal pads for thin film packages'20016,083,375'Process for producing corrosion-resistant terminal metal pads for thin film packages'20006,037,044'Direct deposit thin film single/multi chip module'20005,931,222'Adhesion promoting layer for bonding polymeric adhesive to metal and a heat sink assembly using same'19995,912,044'Method for forming thin film capacitors'19995,370,974'Laser exposure of photosensitive polyimide for pattern formation'19945,277,725'Process for fabricating a low dielectric composite substrate'19945,270,151'Spin on oxygen reactive ion etch barrier'19935,135,595'Process for fabricating a low dielectric composite substrate'1992Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1992–2011Patents assigned to IBM (20)· patent assignee history
1992–2012Based in Poughkeepsie, NY, US· patent location history
2012Patents assigned to BELANGER LUC (1)· patent assignee history
2012Patents assigned to BUCHWALTER LEENA PAIVIKKI (1)· patent assignee history
2012Patents assigned to BUCHWALTER STEPHEN L (1)· patent assignee history
2012Patents assigned to GIRI AJAY P (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 20 | 1992–2011 |
| BELANGER LUC | 1 | 2012 |
| BUCHWALTER LEENA PAIVIKKI | 1 | 2012 |
| BUCHWALTER STEPHEN L | 1 | 2012 |
| GIRI AJAY Pself | 1 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Poughkeepsie, New York, US | 21 | 1992–2012 |