Inventor
Edmund M. Sikorski
Inventor
Florida, NY, US
Overview
Patents· 6 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1038%
H10DInorganic electric semiconductor devices31%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1019%
H01LSemiconductor devices13%
PatentTitleYear
9,711,365'Etch rate enhancement for a silicon etch process through etch chamber pretreatment'20178,928,124'High aspect ratio and reduced undercut trench etch process for a semiconductor substrate'20158,652,969'High aspect ratio and reduced undercut trench etch process for a semiconductor substrate'20147,820,552'Advanced high-k gate stack patterning and structure containing a patterned high-k gate stack'20106,743,686'Sacrificial polysilicon sidewall process and rapid thermal spike annealing for advance CMOS fabrication'20046,518,136'Sacrificial polysilicon sidewall process and rapid thermal spike annealing for advance CMOS fabrication'2003Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2003–2017Patents assigned to IBM (6)· patent assignee history
2003–2017Based in Florida, NY, US· patent location history
2014–2017Patents assigned to ZEON CORP (3)· patent assignee history
2014Patents assigned to FULLER NICHOLAS C M (1)· patent assignee history
2014Patents assigned to JOSEPH ERIC A (1)· patent assignee history
2014Patents assigned to MATSUURA GOH (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 6 | 2003–2017 |
| ZEON CORP | 3 | 2014–2017 |
| FULLER NICHOLAS C M | 1 | 2014 |
| JOSEPH ERIC A | 1 | 2014 |
| MATSUURA GOH | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Florida, New York, US | 6 | 2003–2017 |