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Inventor

Jing Li

Inventor
Ossining, NY, US

Overview

62→
Patents
2010–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 62 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores21%
G06FElectric digital data processing18%
H01LSemiconductor devices9%
H04LTransmission of digital information, e.g. telegraphic communication9%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
H10DInorganic electric semiconductor devices6%
H10NElectric solid-state devices not otherwise provided for6%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h106%
H10BElectronic memory devices5%
G06NComputing arrangements based on specific computational models4%
PatentTitleYear
10,832,809Case management model processing202010,664,336System, method and computer program product for adaptive application log analysis202010,594,772Distributed file transfer with high performance202010,594,771Distributed file transfer with high performance202010,566,081Method and system for automatic knowledge-based feature extraction from electronic medical records202010,474,956Detecting deviations between event log and process model201910,467,539Detecting deviations between event log and process model201910,452,987Detecting deviations between event log and process model201910,437,565Dynamic code suggestion201910,417,569Detecting deviations between event log and process model201910,372,893Sensor-based authentication201910,225,321Distributed file transfer with high performance201910,218,774Distributed file transfer with high performance201910,009,412Distributed file transfer with high performance20189,606,908'Memory controller for memory with mixed cell array and method of controlling the memory'20179,563,371'Self-adjusting phase change memory storage module'20179,343,545'Electrical coupling of memory cell access devices to a word line'20169,311,009'Memory with mixed cell array and system including the memory'20169,299,804'Electrical coupling of memory cell access devices to a word line'20169,298,383'Memory with mixed cell array and system including the memory'20169,281,278'Interconnects with improved TDDB'20169,269,435'Drift mitigation for multi-bits phase change memory'20169,250,816'Adaptive reference tuning for endurance enhancement of non-volatile memories'20169,166,161'Phase change memory cell with large electrode contact area'20159,146,852'Method of reducing system power with mixed cell memory array'20159,122,404'Adaptive reference tuning for endurance enhancement of non-volatile memories'20159,032,136'Memory controller for memory with mixed cell array and method of controlling the memory'20158,946,073'Phase change memory cell with large electrode contact area'20158,949,108'Document processing, template generation and concept library generation method and apparatus'20158,943,374'Writing scheme for phase change material-content addressable memory'20158,927,424'Self-aligned patterning technique for semiconductor device features'20158,927,425'Self-aligned patterning technique for semiconductor device features'20158,921,820'Phase change memory cell with large electrode contact area'20148,902,690'Decoding scheme for bipolar-based diode three-dimensional memory requiring unipolar programming'20148,873,271'3D architecture for bipolar memory using bipolar access device'20148,854,872'Drift mitigation for multi-bits phase change memory'20148,842,491'Decoding scheme for bipolar-based diode three-dimensional memory requiring unipolar programming'20148,837,198'Multi-bit resistance measurement'20148,815,718'Vertical surround gate formation compatible with CMOS integration'20148,767,447'Drift-insensitive or invariant material for phase change memory'20148,755,213'Decoding scheme for bipolar-based diode three-dimensional memory requiring bipolar programming'20148,737,121'Drift-insensitive or invariant material for phase change memory'20148,717,802'Reconfigurable multi-level sensing scheme for semiconductor memories'20148,687,398'Sense scheme for phase change material content addressable memory'20148,658,498'Single mask spacer technique for semiconductor device features'20148,652,901'Single-mask spacer technique for semiconductor device features'20148,638,598'Multi-bit resistance measurement'20148,619,540'Apparatus and method for transmitting and receiving uplink sounding signal in broadband wireless communication system'20138,614,911'Energy-efficient row driver for programming phase change memory'20138,605,497'Parallel programming scheme in multi-bit phase change memory'20138,560,902'Writing scheme for phase change material-content addressable memory'20138,446,748'Content addressable memories with wireline compensation'20138,358,007'Integrated circuit system employing low-k dielectrics and method of manufacture thereof'20138,356,095'Method and apparatus for transferring context information on web server'20138,321,517'Method and system for processing emails'20128,301,841'Method and system for caching terminology data'20128,266,580'Editing, creating, and verifying reorganization of flowchart, and transforming between flowchart and tree diagram'20128,053,361'Interconnects with improved TDDB'20117,906,426'Method of controlled low-k via etch for Cu interconnections'20117,873,939'Processing logic modeling and execution'20117,687,381'Method of forming electrical interconnects within insulating layers that form consecutive sidewalls including forming a reaction layer on the inner sidewall'20107,647,577'Editing, creating, and verifying reorganization of flowchart, and transforming between flowchart and tree diagram'2010

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2010–2020Patents assigned to IBM (57)· patent assignee history
2010–2020Based in Beijing, CN· patent location history
2010–2016Based in Chongqing, CN· patent location history
2012–2017Patents assigned to LI JING (26)· patent assignee history
2013–2017Patents assigned to LAM CHUNG H (19)· patent assignee history
2013–2015Patents assigned to MONTOYE ROBERT K (7)· patent assignee history
2013–2017Based in Ossining, NY, US· patent location history
2013–2016Based in Yorktown Heights, NY, US· patent location history
2015–2017Patents assigned to DAI BING (4)· patent assignee history
2016Based in Madison, WI, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
IBM572010–2020
LI JINGself262012–2017
LAM CHUNG H192013–2017
MONTOYE ROBERT K72013–2015
DAI BING42015–2017
Locations
LocationPatentsSpan
Ossining, New York, US292013–2017
Beijing, CN212010–2020
Chongqing, CN42010–2016
Yorktown Heights, New York, US42013–2016
Madison, WI, US12016