Inventor
Chiou-Feng Chen
Inventor
Cupertino, CA, US
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Bprimary
H10BElectronic memory devices43%
G11CStatic stores30%
H10DInorganic electric semiconductor devices27%
PatentTitleYear
7,718,488'Process of fabricating flash memory with enhanced program and erase coupling'20107,646,641'NAND flash memory with nitride charge storage gates and fabrication process'20107,501,321'NAND flash memory with densely packed memory gates and fabrication process'20097,217,621'Self-aligned split-gate NAND flash memory and fabrication process'20077,046,552'Flash memory with enhanced program and erase coupling and process of fabricating the same'20067,037,787'Flash memory with trench select gate and fabrication process'20066,992,929'Self-aligned split-gate NAND flash memory and fabrication process'20066,894,339'Flash memory with trench select gate and fabrication process'20056,885,586'Self-aligned split-gate NAND flash memory and fabrication process'20056,747,310'Flash memory cells with separated self-aligned select and erase gates, and process of fabrication'20046,590,253'Memory cell with self-aligned floating gate and separate select gate, and fabrication process'20036,503,785'Flash memory cell with contactless bit line, and process of fabrication'20036,426,896'Flash memory cell with contactless bit line, and process of fabrication'20026,313,498'Flash memory cell with thin floating gate with rounded side wall, and fabrication process'20016,291,297'Flash memory cell with self-aligned gates and fabrication process'20016,222,227'Memory cell with self-aligned floating gate and separate select gate, and fabrication process'20016,184,554'Memory cell with self-aligned floating gate and separate select gate, and fabrication process'20016,140,182'Nonvolatile memory with self-aligned floating gate and fabrication process'20006,091,104'Flash memory cell with self-aligned gates and fabrication process'2000Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2000–2005Patents assigned to ACTRANS SYSTEM INC (10)· patent assignee history
2000–2003Based in Cupertino, CA, US· patent location history
2004–2006Based in Hsinchu, TW· patent location history
2005–2006Patents assigned to ACTRANS SYSTEM INC USA (4)· patent assignee history
2006–2010Based in Santa Clara, CA, US· patent location history
2007–2010Patents assigned to SILICON STORAGE TECH INC (4)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| ACTRANS SYSTEM INC | 10 | 2000–2005 |
| ACTRANS SYSTEM INC USA | 4 | 2005–2006 |
| SILICON STORAGE TECH INC | 4 | 2007–2010 |
Locations
| Location | Patents | Span |
|---|---|---|
| Cupertino, California, US | 9 | 2000–2003 |
| Santa Clara, California, US | 6 | 2006–2010 |
| Hsinchu, TW | 4 | 2004–2006 |