Inventor

Wenliang Chen

Inventor
Portland, OR, US

Overview

25→
Patents
1998–2020
Patent span
Physics
Primary field (CPC G)

Patents· 25 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores25%
G06FElectric digital data processing19%
H01LSemiconductor devices8%
G05FSystems for regulating electric or magnetic variables6%
H10BElectronic memory devices6%
LOC146%
A61BDiagnosis3%
G01NInvestigating or analysing materials by determining their chemical or physical properties3%
H02HEmergency protective circuit arrangements3%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems3%
PatentTitleYear
10,811,402Memory device and microelectronic package having the same202010,622,070Ferroelectric memory device202010,109,350Ferroelectric memory device201810,020,311Semiconductor memory device provided with DRAM cell including two transistors and common capacitor20189,942,956Boost converter design with 100%-pass mode for WLED backlight and camera flash applications20188,996,338'Method of component concentration detection based on reference wavelength'20158,890,227'Memory cell'2014D0633084'Speaker'20117,855,863'Driver with electrostatic discharge protection'2010D0626939'Speaker'20107,533,399'Programming guide content collection and recommendation system for viewing on a portable device'20096,956,918'Method for bi-directional data synchronization between different clock frequencies'20056,919,753'Temperature independent CMOS reference voltage circuit for low-voltage applications'20056,903,598'Static, low-voltage fuse-based cell with high-voltage programming'20056,826,106'Asynchronous hidden refresh of semiconductor memory'20046,747,507'Bias generator with improved stability for self biased phase locked loop'20046,625,077'Asynchronous hidden refresh of semiconductor memory'20036,594,195'Low-power, high-density semiconductor memory device'20036,560,139'Low leakage current SRAM array'20036,438,682'Method and apparatus for predicting loop exit branches'20026,185,676'Method and apparatus for performing early branch prediction in a microprocessor'20016,173,379'Memory device for a microprocessor register file having a power management scheme and method for copying information between memory sub-cells in a single clock cycle'20015,903,750'Dynamic branch prediction for branch instructions with multiple targets'19995,815,700'Branch prediction table having pointers identifying other branches within common instruction cache lines'19985,802,602'Method and apparatus for performing reads of related data from a set-associative cache memory'1998

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1998–2005Patents assigned to INTEL CORP (8)· patent assignee history
1998–2002Based in Sunnyvale, CA, US· patent location history
2003Patents assigned to CASCADE SEMICONDUCTOR CORP (2)· patent assignee history
2003–2005Based in Portland, OR, US· patent location history
2004–2018Patents assigned to TEXAS INSTRUMENTS INC (4)· patent assignee history
2004–2018Based in Plano, TX, US· patent location history
2010–2015Patents assigned to CHEN WENLIANG (3)· patent assignee history
2010–2011Based in Quanzhou, CN· patent location history
2014–2020Patents assigned to AP MEMORY CORP USA (3)· patent assignee history
2014–2020Based in Vancouver, WA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INTEL CORP81998–2005
TEXAS INSTRUMENTS INC42004–2018
AP MEMORY CORP USA32014–2020
CHEN WENLIANGself32010–2015
CASCADE SEMICONDUCTOR CORP22003
Locations
LocationPatentsSpan
Portland, OR, US62003–2005
Sunnyvale, California, US61998–2002
Plano, Texas, US42004–2018
Vancouver, Washington, US32014–2020
Quanzhou, CN22010–2011