Inventor
ANTHONY K. STAMPER
Inventor
US
Overview
Patents· 58 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices28%
H10DInorganic electric semiconductor devices25%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1022%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1015%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation1%
B81BMicrostructural devices or systems, e.g. micromechanical devices1%
B81CProcesses or apparatus specially adapted for the manufacture or treatment of microstructural devices or systems1%
H10NElectric solid-state devices not otherwise provided for1%
G01KMeasuring temperature0%
G01NInvestigating or analysing materials by determining their chemical or physical properties0%
PatentTitleYear
12,336,285Field effect transistor with shallow trench isolation features within source/drain regions202512,324,227Heterojunction bipolar transistor with buried trap rich isolation region202512,243,923Contact-over-active-gate transistor structures with contacts landed on enlarged gate portions202512,170,313Heterojunction bipolar transistor with buried trap rich isolation region202412,142,686Field effect transistor202412,119,352IC structure including porous semiconductor layer in bulk substrate adjacent trench isolation202412,027,582IC structure including porous semiconductor layer under trench isolation202412,027,580Semiconductor on insulator wafer with cavity structures202411,876,123Heterojunction bipolar transistors with stress material for improved mobility202411,848,192Heterojunction bipolar transistor with emitter base junction oxide interface202311,823,948Bulk wafer switch isolation202311,817,479Transistor with air gap under raised source/drain region in bulk semiconductor substrate202311,791,334Heterojunction bipolar transistor with buried trap rich isolation region202311,764,225Field effect transistor with shallow trench isolation features within source/drain regions202311,749,559Bulk substrates with a self-aligned buried polycrystalline layer202311,749,717Transistor with embedded isolation layer in bulk substrate202311,749,599Dual thickness fuse structures202311,728,348Vertically stacked field effect transistors202311,721,719Heterojunction bipolar transistor with buried trap rich isolation region202311,710,655Integrated circuit structure with semiconductor-based isolation structure and methods to form same202311,677,000IC structure including porous semiconductor layer under trench isolations adjacent source/drain regions202311,658,177Semiconductor device structures with a substrate biasing scheme202311,639,895Device including optofluidic sensor with integrated photodiode202311,637,068Thermally and electrically conductive interconnects202311,605,710Transistor with air gap under source/drain region in bulk semiconductor substrate202311,574,863Local interconnect layer with device within second dielectric material, and related methods202311,569,405Photodetectors with a lateral composition gradient202311,545,548Gate contacts with airgap isolation202311,527,432Bulk substrates with a self-aligned buried polycrystalline layer202211,515,397III-V compound semiconductor layer stacks with electrical isolation provided by a trap-rich layer202211,488,950Integrated circuit structure and method for bipolar transistor stack within substrate202211,488,980Wafer with localized semiconductor on insulator regions with cavity structures202211,469,178Metal-free fuse structures202211,437,522Field-effect transistors with a polycrystalline body in a shallow trench isolation region202211,411,081Field effect transistor (FET) stack and methods to form same202211,410,872Oxidized cavity structures within and under semiconductor devices202211,380,615Tight pitch wirings and capacitor(s)202211,380,759Transistor with embedded isolation layer in bulk substrate202211,355,409Chip package with emitter finger cells spaced by different spacings from a heat sink to provide reduced temperature variation202211,333,558Boolean temperature sensing using phase transition material202211,322,357Buried damage layers for electrical isolation202211,322,387Bulk wafer switch isolation202211,315,825Semiconductor structures including stacked depleted and high resistivity regions202211,316,045Vertical field effect transistor (FET) with source and drain structures202211,296,190Field effect transistors with back gate contact and buried high resistivity layer202211,282,883Trench-based photodiodes202211,271,079Wafer with crystalline silicon and trap rich polysilicon layer202211,271,077Trap-rich layer in a high-resistivity semiconductor layer202211,264,499Transistor devices with source/drain regions comprising an interface layer that comprises a non-semiconductor material202211,264,457Isolation trenches augmented with a trap-rich layer202211,195,715Epitaxial growth constrained by a template202111,183,514Vertically stacked field effect transistors202111,177,158Integrated circuit structure with semiconductor-based isolation structure and methods to form same202111,177,345Heterojunction bipolar transistor202111,174,160Planar cavity MEMS and related structures, methods of manufacture and design structures202111,164,867Fin-type field-effect transistors over one or more buried polycrystalline layers202111,158,535Multi-depth regions of high resistivity in a semiconductor substrate202111,158,722Transistors with lattice structure2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2025Patents assigned to GLOBALFOUNDRIES US INC (55)· patent assignee history
2021Patents assigned to IBM (1)· patent assignee history
2021–2025Based in US· patent location history
2022–2023Patents assigned to GLOBALFOUNDRIES INC (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| GLOBALFOUNDRIES US INC | 55 | 2021–2025 |
| GLOBALFOUNDRIES INC | 3 | 2022–2023 |
| IBM | 1 | 2021 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 58 | 2021–2025 |