Inventor
Jonathan Pabustan
Inventor
San Lorenzo, CA, US
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores70%
G06FElectric digital data processing30%
PatentTitleYear
9,423,969'Sensing operations in a memory device'20169,123,423'Programming operations in a memory device'20158,773,912'Soft landing for desired program threshold voltage'20148,737,127'Memory controllers to output data signals of a number of bits and to receive data signals of a different number of bits'20148,713,246'Memory device program window adjustment'20148,611,156'Sensing operations in a memory device'20138,385,121'Memory adapted to program a number of bits to a memory cell and read a different number of bits from the memory cell'20138,307,152'Memory device program window adjustment'20128,274,835'Mitigation of runaway programming of a memory device'20128,254,180'Methods of operating memories including characterizing memory cell signal lines'20128,243,523'Sensing operations in a memory device'20128,223,551'Soft landing for desired program threshold voltage'20128,169,832'Methods of erase verification for a flash memory device'20128,117,375'Memory device program window adjustment'20128,023,334'Program window adjust for memory cell signal line delay'20117,974,136'Method for erasing a flash memory cell or an array of such cells having improved erase coupling ratio'20117,864,589'Mitigation of runaway programming of a memory device'20117,843,725'M+L bit read column architecture for M bit memory cells'20107,835,190'Methods of erase verification for a flash memory device'20107,668,013'Method for erasing a flash memory cell or an array of such cells having improved erase coupling ratio'20107,434,092'Semiconductor memory and method of storing configuration data'20087,239,550'Method of programming a non-volatile memory cell'2007Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2007–2016Based in San Lorenzo, CA, US· patent location history
2010–2016Patents assigned to MICRON TECHNOLOGY INC (18)· patent assignee history
2012–2014Patents assigned to PABUSTAN JONATHAN (11)· patent assignee history
2012–2014Patents assigned to SARIN VISHAL (11)· patent assignee history
2012–2014Patents assigned to ROOHPARVAR FRANKIE F (8)· patent assignee history
2012–2014Patents assigned to HOEI JUNG-SHENG (7)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 18 | 2010–2016 |
| PABUSTAN JONATHANself | 11 | 2012–2014 |
| SARIN VISHAL | 11 | 2012–2014 |
| ROOHPARVAR FRANKIE F | 8 | 2012–2014 |
| HOEI JUNG-SHENG | 7 | 2012–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Lorenzo, California, US | 22 | 2007–2016 |