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Inventor

Hengyang Lin

Inventor
San Ramon, CA, US

Overview

4→
Patents
2000–2012
Patent span
Electricity
Primary field (CPC H)

Patents· 4 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1040%
G01RMeasuring electric variables20%
G11CStatic stores20%
H10DInorganic electric semiconductor devices20%
PatentTitleYear
8,284,600'5-transistor non-volatile memory cell'20127,863,644'Bipolar transistor and method of forming the bipolar transistor with a backside contact'20117,188,044'World-wide distributed testing for integrated circuits'20076,100,590'Low capacitance multilevel metal interconnect structure and method of manufacture'2000

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2000–2012Patents assigned to NAT SEMICONDUCTOR CORP (4)· patent assignee history
2000–2007Based in San Jose, CA, US· patent location history
2011–2012Based in San Ramon, CA, US· patent location history
2012Patents assigned to HO ERNES (1)· patent assignee history
2012Patents assigned to KHAN UMER (1)· patent assignee history
2012Patents assigned to LIN HENGYANG JAMES (1)· patent assignee history
2012Patents assigned to POPLEVINE PAVEL (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
NAT SEMICONDUCTOR CORP42000–2012
HO ERNES12012
KHAN UMER12012
LIN HENGYANG JAMESself12012
POPLEVINE PAVEL12012
Locations
LocationPatentsSpan
San Ramon, California, US22011–2012
San Jose, California, US22000–2007