Inventor
Mark A. Stettler
Inventor
Hillsboro, OR, US
Overview
Patents· 5 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices50%
B82YSpecific uses or applications of nanostructures20%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1020%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests10%
PatentTitleYear
7,470,972'Complementary metal oxide semiconductor integrated circuit using uniaxial compressive stress and biaxial compressive stress'20087,226,843'Indium-boron dual halo MOSFET'20077,091,560'Method and structure to decrease area capacitance within a buried insulator device'20066,867,104'Method to form a structure to decrease area capacitance within a buried insulator device'20056,020,244'Channel dopant implantation with automatic compensation for variations in critical dimension'2000Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2000–2008Patents assigned to INTEL CORP (5)· patent assignee history
2000–2008Based in Hillsboro, OR, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 5 | 2000–2008 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hillsboro, OR, US | 5 | 2000–2008 |