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Inventor

Xin Wang

Inventor
Beijing, CN

Overview

48→
Patents
2006–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 48 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing19%
H10DInorganic electric semiconductor devices19%
H01LSemiconductor devices14%
H04LTransmission of digital information, e.g. telegraphic communication10%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h105%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices4%
H04NPictorial communication, e.g. television4%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation4%
G06NComputing arrangements based on specific computational models2%
PatentTitleYear
11,113,106Coordinating distributed task execution202110,777,601CMOS image sensor with compact pixel layout202010,727,268CMOS image sensor with compact pixel layout202010,701,298CMOS image sensor with single photodiode compact pixel layout202010,691,755Organizing search results based upon clustered content202010,563,123CuInS20209,767,156'Feature-based candidate selection'20179,703,782'Associating media with metadata of near-duplicates'20179,703,895'Organizing search results based upon clustered content'20179,678,992'Text to image translation'20179,652,444'Real-time annotation and enrichment of captured video'20179,607,989'Forming self-aligned NiSi placement with improved performance and yield'20179,349,749'Semiconductor device including SIU butted junction to reduce short-channel penalty'20169,312,358'Partially-blocked well implant to improve diode ideality with SiGe anode'20169,252,234'Partially-blocked well implant to improve diode ideality with SiGe anode'20169,165,944'Semiconductor device including SOI butted junction to reduce short-channel penalty'20159,123,783'Integrated circuits and methods of forming integrated circuits with interlayer dielectric protection'20159,105,725'Semiconductor-on-insulator device including stand-alone well implant to provide junction butting'20159,059,291'Semiconductor-on-insulator device including stand-alone well implant to provide junction butting'20159,034,715'Method and structure for dielectric isolation in a fin field effect transistor'20159,001,146'Automatically determining an object display mode to display objects'20158,995,771'Identification of duplicates within an image space'20158,903,798'Real-time annotation and enrichment of captured video'20148,847,401'Semiconductor structure incorporating a contact sidewall spacer with a self-aligned airgap and a method of forming the semiconductor structure'20148,620,912'Ranking advertisement(s) based upon advertisement feature(s)'20138,606,780'Image re-rank based on image annotations'20138,559,682'Building a person profile database'20138,435,849'Method of forming a CMOS IC having a compressively stressed metal layer in the NMOS area'20138,346,701'Answer ranking in community question-answering sites'20138,185,482'Modeling semantic and structure of threaded discussions'20128,131,539'Search-based word segmentation method and device for language without word boundary tag'20128,124,486'Method to enhance channel stress in CMOS processes'20128,114,727'Disposable spacer integration with stress memorization technique and silicon-germanium'20128,048,750'Method to enhance channel stress in CMOS processes'20117,979,811'Intermediate layout for resolution enhancement in semiconductor fabrication'20117,849,179'System and program for managing devices in a network'20107,799,642'Trench MOSFET and method of manufacture utilizing two masks'20107,792,966'Zone control weights'20107,759,238'Method for fabricating semiconductor device capable of adjusting the thickness of gate oxide layer'20107,702,932'Power management of a network by increasing a number of adjacent flows that share a computing device'20107,687,352'Trench MOSFET and method of manufacture utilizing four masks'20107,682,929'Method and structure for double lining for shallow trench isolation'20107,587,421'Method, system, and article of manufacture for generating device specific requests'20097,404,173'Intermediate layout for resolution enhancement in semiconductor fabrication'20087,386,609'Method, system, and program for managing devices in a network'20087,337,424'Flexible shape identification for optical proximity correction in semiconductor fabrication'20087,203,850'Power management for a network utilizing a vertex/edge graph technique'20077,058,598'Web price optimizer of multiple-item package orders for e-commerce on the internet and method of use'2006

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2006–2016Patents assigned to IBM (14)· patent assignee history
2007–2014Patents assigned to MICROSOFT CORP (8)· patent assignee history
2008–2010Based in San Jose, CA, US· patent location history
2008–2011Based in Sunnyvale, CA, US· patent location history
2010–2020Based in Shanghai, CN· patent location history
2012–2017Patents assigned to WANG XIN-JING (11)· patent assignee history
2012–2017Patents assigned to ZHANG LEI (8)· patent assignee history
2012–2020Based in Beijing, CN· patent location history
2014–2016Based in Beacon, NY, US· patent location history
2015–2021Patents assigned to MICROSOFT TECHNOLOGY LICENSING LLC (8)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
IBM142006–2016
WANG XIN-JINGself112012–2017
MICROSOFT CORP82007–2014
MICROSOFT TECHNOLOGY LICENSING LLC82015–2021
ZHANG LEI82012–2017
Locations
LocationPatentsSpan
Beijing, CN152012–2020
Beacon, New York, US82014–2016
Shanghai, CN52010–2020
San Jose, California, US42008–2010
Sunnyvale, California, US32008–2011