Inventor
Teck Jung Tang
Inventor
Ballston Lake, NY, US
Overview
Patents· 12 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1021%
H01LSemiconductor devices18%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1015%
H10DInorganic electric semiconductor devices12%
G06FElectric digital data processing9%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests6%
B22FWorking metallic powder3%
B29CShaping or joining of plastics3%
B33YAdditive manufacturing, i.e. manufacturing of three-dimensional [3d] objects by additive deposition, additive agglomeration or additive layering, e.g. by 3d printing, stereolithography or selective laser sintering3%
G05BControl or regulating systems in general3%
PatentTitleYear
11,022,957System and method for adaptive domain reduction for thermo-structural simulation of additive manufacturing process20219,947,645Multi-project wafer with IP protection by reticle mask pattern modification20189,576,894'Integrated circuits including organic interlayer dielectric layers and methods for fabricating the same'20179,362,162'Methods of fabricating BEOL interlayer structures'20169,142,451'Reduced capacitance interlayer structures and fabrication methods'20159,105,507'Methods of forming a FinFET semiconductor device with undoped fins'20159,069,923'IP protection'20158,969,932'Methods of forming a finfet semiconductor device with undoped fins'20158,637,993'3D integrated circuit system with connecting via structure and method for forming the same'20148,283,193'Integrated circuit system with sealring and method of manufacture thereof'20127,906,426'Method of controlled low-k via etch for Cu interconnections'20117,749,894'Integrated circuit processing system'2010Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2011–2018Patents assigned to GLOBALFOUNDRIES SG PTE LTD (4)· patent assignee history
2011–2018Patents assigned to IBM (3)· patent assignee history
2011Based in Johor, MY· patent location history
2012–2015Patents assigned to TANG TECK JUNG (3)· patent assignee history
2012Based in Singapore, SG· patent location history
2014–2017Patents assigned to GLOBALFOUNDRIES INC (6)· patent assignee history
2014–2017Based in Ballston Lake, NY, US· patent location history
2015–2018Patents assigned to RENESAS ELECTRONICS CORP (2)· patent assignee history
2015–2018Based in Beacon, NY, US· patent location history
2021Based in Plainsboro, NJ, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| GLOBALFOUNDRIES INC | 6 | 2014–2017 |
| GLOBALFOUNDRIES SG PTE LTD | 4 | 2011–2018 |
| IBM | 3 | 2011–2018 |
| TANG TECK JUNGself | 3 | 2012–2015 |
| RENESAS ELECTRONICS CORP | 2 | 2015–2018 |
Locations
| Location | Patents | Span |
|---|---|---|
| Ballston Lake, New York, US | 6 | 2014–2017 |
| Beacon, New York, US | 2 | 2015–2018 |
| Plainsboro, New Jersey, US | 1 | 2021 |
| Singapore, SG | 1 | 2012 |
| Johor, MY | 1 | 2011 |