Inventor
DAVID AARON PALMER
Inventor
US
Overview
Patents· 76 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing59%
G11CStatic stores22%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use13%
G01KMeasuring temperature2%
G05BControl or regulating systems in general2%
H03MCoding2%
H04LTransmission of digital information, e.g. telegraphic communication2%
PatentTitleYear
12,561,097Mobile storage random read performance estimation enhancements202612,530,147Sequentializing data of a memory system202612,524,339Logical-to-physical table compression using an exception list and a logical tree202612,499,010Cryptographic data integrity protection202512,487,745Suspending operations of a memory system202512,468,627Address mapping table compression202512,422,985Write quality in memory systems202512,417,173Valid data identification for garbage collection202512,359,978Temperature exception tracking in a temperature log for a memory system202512,353,723Low-power boot-up for memory systems202512,353,719Thermal duplication of data202512,292,831Enhanced data reliability in multi-level memory cells202512,271,310Write width aligned storage device buffer flush202512,271,620Techniques for improved write performance modes202512,242,374Logical address granularity configurations for logical address space partitions202512,204,792Adaptive throughput monitoring202512,182,027Cache block budgeting techniques202412,135,887Sequential data optimized sub-regions in storage devices202412,130,747Dynamic logical page sizes for memory devices202412,124,721Power safety configurations for logical address space partitions202412,105,959Suspending operations of a memory system202412,086,027Methods and system with dynamic ECC voltage and frequency202412,050,804Valid data aware media reliability scanning202412,007,889Valid data identification for garbage collection202411,988,563Temperature exception tracking in a temperature log for a memory system202411,989,456Mobile storage random read performance estimation enhancements202411,966,600Memory device with enhanced data reliability capabilities202411,960,398Enhanced data reliability in multi-level memory cells202411,914,897Arbitration techniques for managed memory202411,892,956Performance of memory system background operations202411,874,772Garbage collection adapted to host write activity202411,868,632Power control for boot-up of memory systems202411,853,602Techniques for adjusting a granularity associated with read disturb tracking202311,809,311Host-based flash memory maintenance techniques202311,797,380Host-configurable error protection202311,775,389Deferred error-correction parity calculations202311,775,422Logic remapping techniques for memory devices202311,762,565Reset interception to avoid data loss in storage device resets202311,755,214Sequential data optimized sub-regions in storage devices202311,740,679Adaptive sleep transition techniques202311,740,963Methods and system with dynamic ECC voltage and frequency202311,734,170Host-resident translation layer validity check202311,721,388Large file integrity techniques202311,714,712Extended error correction in storage device202311,693,732Cryptographic data integrity protection202311,693,769Garbage collection adapted to memory device life expectancy202311,687,277Arbitration techniques for managed memory202311,687,469Host-resident translation layer validity check techniques202311,681,461Host inquiry response generation in a memory device202311,656,794Host timeout avoidance in a memory device202311,656,673Managing reduced power memory operations202311,625,323Generating and using session tables for session-based memory management202311,621,042Dynamic delay of NAND read commands202311,561,892Garbage collection adapted to user device access202311,556,479Cache block budgeting techniques202311,550,711Dynamically adjusted garbage collection workload202311,537,527Dynamic logical page sizes for memory devices202211,537,327Adaptive watchdog in a memory device202211,520,524Host adaptive memory device optimization202211,500,769Valid data identification for garbage collection202211,467,763Valid data aware media reliability scanning for memory sub-blocks202211,397,640Extended error correction in storage device202211,392,451Methods and system with dynamic ECC voltage and frequency202211,314,427Memory device with enhanced data reliability capabilities202211,294,585Sequential data optimized sub-regions in storage devices202211,294,767Deferred error-correction parity calculations202211,295,806Large file integrity techniques202211,287,986Reset interception to avoid data loss in storage device resets202211,263,124Host-resident translation layer validity check202211,237,617Arbitration techniques for managed memory202211,226,907Host-resident translation layer validity check techniques202211,226,894Host-based flash memory maintenance techniques202211,194,511Arbitration techniques for managed memory202111,188,461Garbage collection adapted to memory device life expectancy202111,182,102Host inquiry response generation in a memory device202111,157,404Remapping techniques for a range of logical block addresses in a logical to physical table of NAND storage2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2026Patents assigned to MICRON TECHNOLOGY INC (73)· patent assignee history
2021–2026Based in US· patent location history
2024Patents assigned to LODESTAR LICENSING GROUP LLC (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 73 | 2021–2026 |
| LODESTAR LICENSING GROUP LLC | 3 | 2024 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 76 | 2021–2026 |