Inventor
Bjorn O. Liencres
Inventor
Palo Alto, CA, US
Overview
Patents· 23 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing43%
H04LTransmission of digital information, e.g. telegraphic communication27%
H04QSelecting27%
H02JElectric power networks2%
H04JMultiplex communication2%
PatentTitleYear
9,411,776'Separation of data and control in a switching device'20168,761,180'Memory organization in a network device'20148,681,796'Separation of data and control in a switching device'20148,477,784'Memory organization in a switching device'20138,189,605'Separation of data and control in a switching device'20127,903,659'Memory organization in a switching device'20117,545,808'Memory organization in a switching device'20097,489,699'Separation of data and control in a switching device'20097,116,660'Memory organization in a switching device'20066,917,620'Separation of data and control in a switching device'20056,636,518'Synchronizing source-synchronous links in a switching device'20036,493,347'Memory organization in a switching device'20025,978,874'Implementing snooping on a split-transaction computer system bus'19995,911,052'Split transaction snooping bus protocol'19995,905,725'High speed switching device'19995,829,033'Optimizing responses in a coherent distributed electronic system including a computer system'19985,765,196'System and method for servicing copyback requests in a multiprocessor system with a shared memory'19985,644,731'Method and apparatus for hot plugging/unplugging a sub-system to an electrically powered system'19975,497,470'Method and apparatus for providing a high through put cache tag controller'19965,434,993'Methods and apparatus for creating a pending write-back controller for a cache controller on a packet switched memory bus employing dual directories'19955,287,362'Mechanism for implementing multiple time-outs'19945,195,089'Apparatus and method for a synchronous, high speed, packet-switched bus'19935,185,862'Apparatus for constructing data frames for transmission over a data link'1993Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1993–1999Patents assigned to SUN MICROSYSTEMS INC (9)· patent assignee history
1993–2016Based in Palo Alto, CA, US· patent location history
2002–2016Patents assigned to JUNIPER NETWORKS INC (11)· patent assignee history
2012–2014Patents assigned to AGARWAL NALINI (3)· patent assignee history
2012–2014Patents assigned to FERGUSON DENNIS C (3)· patent assignee history
2012–2014Patents assigned to JU HANN-HWAN (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| JUNIPER NETWORKS INC | 11 | 2002–2016 |
| SUN MICROSYSTEMS INC | 9 | 1993–1999 |
| AGARWAL NALINI | 3 | 2012–2014 |
| FERGUSON DENNIS C | 3 | 2012–2014 |
| JU HANN-HWAN | 3 | 2012–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Palo Alto, California, US | 23 | 1993–2016 |