Inventor
Sung-Un Kwon
Inventor
Suwon-si, KR
Overview
Patents· 20 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Bprimary
H10BElectronic memory devices33%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1024%
H01LSemiconductor devices13%
H10DInorganic electric semiconductor devices13%
H10NElectric solid-state devices not otherwise provided for11%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h104%
G11CStatic stores2%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
PatentTitleYear
10,700,074Semiconductor devices202010,573,653Semiconductor devices having contact plugs overlapping associated bitline structures and contact holes202010,446,558Method of manufacturing semiconductor devices having contact plugs overlapping associated bitline structures and contact holes201910,177,155Method of manufacturing semiconductor devices having contact plugs overlapping associated bitline structures and contact holes20199,786,672'Method of manufacturing semiconductor devices having contact plugs overlapping associated bitline structures and contact holes'20179,754,785'Methods of manufacturing semiconductor devices'20179,490,256'Semiconductor devices having contact plugs overlapping associated bitline structures and contact holes and method of manufacturing the same'20168,790,976'Method of forming semiconductor device having self-aligned plug'20148,772,121'Phase change memory devices and methods of manufacturing the same'20148,507,353'Method of forming semiconductor device having self-aligned plug'20138,361,849'Method of fabricating semiconductor device'20138,158,445'Methods of forming pattern structures and methods of manufacturing semiconductor devices using the same'20128,133,757'Method of manufacturing a phase changeable memory unit having an enhanced structure to reduce a reset current'20127,989,279'Method of fabricating semiconductor device'20117,777,265'Semiconductor device having contact barrier and method of manufacturing the same'20107,659,162'Phase change memory device and method of manufacturing the same'20107,531,450'Method of fabricating semiconductor device having contact hole with high aspect-ratio'20097,498,253'Local interconnection method and structure for use in semiconductor device'20097,452,773'Method of manufacturing a flash memory device'20087,202,163'Local interconnection method and structure for use in semiconductor device'2007Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2007–2020Patents assigned to SAMSUNG ELECTRONICS CO LTD (20)· patent assignee history
2007–2009Based in Kyungki-do, KR· patent location history
2010–2014Based in Jeonju-si, KR· patent location history
2010Based in Jeollabuk-do, KR· patent location history
2011–2013Based in Jeonbuk, KR· patent location history
2012–2017Patents assigned to KWON SUNG-UN (7)· patent assignee history
2012–2013Patents assigned to EOM KYOUNG-HA (2)· patent assignee history
2012–2013Patents assigned to HWANG JAE-SEUNG (2)· patent assignee history
2012–2013Patents assigned to PARK DOO-HWAN (2)· patent assignee history
2016–2020Based in Suwon-si, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 20 | 2007–2020 |
| KWON SUNG-UNself | 7 | 2012–2017 |
| EOM KYOUNG-HA | 2 | 2012–2013 |
| HWANG JAE-SEUNG | 2 | 2012–2013 |
| PARK DOO-HWAN | 2 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Suwon-si, KR | 7 | 2016–2020 |
| Jeonju-si, KR | 6 | 2010–2014 |
| Jeonbuk, KR | 2 | 2011–2013 |
| Kyungki-do, KR | 2 | 2007–2009 |
| Jeollabuk-do, KR | 1 | 2010 |