Inventor

Richard Louis Arndt

Inventor

Austin, TX, US

Overview

1977–2021

Patent span

Physics

Primary field (CPC G)

Patents· 133 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing79%

H04LTransmission of digital information, e.g. telegraphic communication13%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use3%

G01BMeasuring length, thickness or similar linear dimensions1%

Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications1%

E04HBuildings or like structures for particular purposes1%

G06KGraphical data reading1%

H04MTelephonic communication1%

H04WWireless communication networks1%

PatentTitleYear

11,074,205Managing efficient selection of a particular processor thread for handling an interrupt2021 10,831,593Live partition mobility enabled hardware accelerator address translation fault resolution2020 10,614,010Handling queued interrupts in a data processing system based on a saturate value2020 10,585,744Managed hardware accelerator address translation fault resolution utilizing a credit2020 10,572,337Live partition mobility enabled hardware accelerator address translation fault resolution2020 10,545,816Managed hardware accelerator address translation fault resolution utilizing a credit2020 10,528,418Hardware accelerator address translation fault resolution2020 10,437,755Techniques for handling interrupts in a processing unit using virtual processor thread groups2019 10,423,550Managing efficient selection of a particular processor thread for handling an interrupt2019 10,289,479Hardware accelerator address translation fault resolution2019 10,255,194Configurable I/O address translation data structure2019 10,241,923Configurable I/O address translation data structure2019 10,229,075Techniques for escalating interrupts in a processing unit using virtual processor thread groups and software stack levels2019 10,216,568Live partition mobility enabled hardware accelerator address translation fault resolution2019 10,169,270Techniques for handling interrupt related information in a data processing system2019 10,114,773Techniques for handling interrupts in a processing unit using virtual processor thread groups and software stack levels2018 10,083,142Addressing topology specific replicated bus units2018 10,061,723Techniques for handling queued interrupts in a data processing system based on a saturation value2018 9,904,638'Techniques for escalating interrupts in a data processing system to a higher software stack level'2018 9,870,329'Techniques for escalating interrupts in a data processing system'2018 9,852,091Techniques for handling interrupts in a processing unit using virtual processor thread groups and software stack levels2017 9,792,232'Techniques for queueing interrupts in a data processing system'2017 9,792,233'Techniques for escalating interrupts in a data processing system to a higher software stack level'2017 9,779,043'Techniques for handling queued interrupts in a data processing system'2017 9,678,901'Techniques for indicating a preferred virtual processor thread to service an interrupt in a data processing system'2017 9,575,913'Techniques for addressing topology specific replicated bus units'2017 9,529,760'Topology specific replicated bus unit addressing in a data processing system'2016 9,514,083'Topology specific replicated bus unit addressing in a data processing system'2016 9,494,991'Energy allocation to groups of virtual machines'2016 9,477,286'Energy allocation to groups of virtual machines'2016 9,454,405'Paging partition arbitration of paging devices to shared memory partitions'2016 9,027,021'Controlling depth and latency of exit of a virtual processor\'s idle state in a power management environment'2015 8,782,024'Managing the sharing of logical resources among separate partitions of a logically partitioned computer system'2014 8,719,554'Scaleable status tracking of multiple assist hardware threads'2014 8,719,638'Assist thread analysis and debug mechanism'2014 8,713,290'Scaleable status tracking of multiple assist hardware threads'2014 8,694,832'Assist thread analysis and debug mechanism'2014 8,645,661'Paging partition arbitration of paging devices to shared memory partitions'2014 8,635,381'System, method and computer program product for monitoring memory access'2014 8,589,556'Allocation of energy budgets to individual partitions'2013 8,544,022'Transactional memory preemption mechanism'2013 8,424,015'Transactional memory preemption mechanism'2013 8,381,005'Processor and memory folding for managing power consumption in information processing systems'2013 8,356,193'Scaling energy use in a virtualized environment'2013 8,341,628'Controlling depth and latency of exit of a virtual processor\'s idle state in a power management environment'2012 8,327,085'Characterizing multiple resource utilization using a relationship model to optimize memory utilization in a virtual machine environment'2012 8,213,294'Mechanism for detecting and clearing I/O fabric lockup conditions for error recovery'2012 8,086,769'Method for detecting circular buffer overrun'2011 8,086,903'Method, apparatus, and computer program product for coordinating error reporting and reset utilizing an I/O adapter that supports virtualization'2011 8,028,105'System and method for virtual adapter resource allocation matrix that defines the amount of resources of a physical I/O adapter'2011 8,024,496'Enhanced memory migration descriptor format and method'2011 7,996,687'Product for providing a scalable trusted platform module in a hypervisor environment'2011 7,979,548'Hardware enforcement of logical partitioning of a channel adapter\'s resources in a system area network'2011 7,970,952'Performance counters for virtualized network interfaces of communications networks'2011 7,966,616'Association of memory access through protection attributes that are associated to an access control level on a PCI adapter that supports virtualization'2011 7,949,008'Method, apparatus and computer program product for cell phone security'2011 7,941,568'Mapping a virtual address to PCI bus address'2011 7,941,577'Association of host translations that are associated to an access control level on a PCI bridge that supports virtualization'2011 7,941,803'Controlling an operational mode for a logical partition on a computing system'2011 7,913,251'Hypervisor virtualization of OS console and operator panel'2011 7,908,457'Retaining an association between a virtual address based buffer and a user space application that owns the buffer'2011 7,895,383'Event queue in a logical partition'2011 7,873,751'Infiniband multicast operation in an LPAR environment'2011 7,870,406'Method and apparatus for frequency independent processor utilization recording register in a simultaneously multi-threaded processor'2011 7,870,301'System and method for modification of virtual adapter resources in a logically partitioned data processing system'2011 7,802,252'Method and apparatus for selecting the architecture level to which a processor appears to conform'2010 7,779,182'System for fully trusted adapter validation of addresses referenced in a virtual host transfer request'2010 7,734,842'Computer-implemented method, apparatus, and computer program product for managing DMA write page faults using a pool of substitute pages'2010 7,685,335'Virtualized fibre channel adapter for a multi-processor data processing system'2010 7,685,321'Native virtualization on a partially trusted adapter using PCI host bus, device, and function number for identification'2010 7,681,083'Isolation of input/output adapter error domains'2010 7,653,801'System and method for managing metrics table per virtual port in a logically partitioned data processing system'2010 7,647,437'Moving, resizing, and memory management for producer-consumer queues by consuming and storing any queue entries from an old queue before entries from a new queue'2010 7,577,764'Method, system, and computer program product for virtual adapter destruction on a physical adapter that supports virtual adapters'2009 7,574,537'Method, apparatus, and computer program product for migrating data pages by disabling selected DMA operations in a physical I/O adapter'2009 7,555,002'Infiniband general services queue pair virtualization for multiple logical ports on a single physical port'2009 7,548,964'Performance counters for virtualized network interfaces of communications networks'2009 7,546,386'Method for virtual resource initialization on a physical adapter that supports virtual resources'2009 7,543,084'Method for destroying virtual resources in a logically partitioned data processing system'2009 7,500,072'Migrating data that is subject to access by input/output devices'2009 7,496,790'Method, apparatus, and computer program product for coordinating error reporting and reset utilizing an I/O adapter that supports virtualization'2009 7,493,425'Method, system and program product for differentiating between virtual hosts on bus transactions and associating allowable memory access for an input/output adapter that supports virtualization'2009 7,493,526'System and method for supporting debugging of host channel adapters in a logical partitioning'2009 7,487,326'Method for managing metrics table per virtual port in a logically partitioned data processing system'2009 7,480,742'Method for virtual adapter destruction on a physical adapter that supports virtual adapters'2009 7,478,246'Method for providing a scalable trusted platform module in a hypervisor environment'2009 7,475,166'Method and system for fully trusted adapter validation of addresses referenced in a virtual host transfer request'2009 7,464,191'System and method for host initialization for an adapter that supports virtualization'2008 7,428,598'Infiniband multicast operation in an LPAR environment'2008 7,398,337'Association of host translations that are associated to an access control level on a PCI bridge that supports virtualization'2008 7,398,427'Isolation of input/output adapter error domains'2008 7,398,328'Native virtualization on a partially trusted adapter using PCI host bus, device, and function number for identification'2008 7,386,637'System, method, and computer program product for a fully trusted adapter validation of incoming memory mapped I/O operations on a physical adapter that supports virtual adapters or virtual resources'2008 7,376,770'System and method for virtual adapter resource allocation matrix that defines the amount of resources of a physical I/O adapter'2008 7,366,813'Event queue in a logical partition'2008 7,356,625'Moving, resizing, and memory management for producer-consumer queues by consuming and storing any queue entries from an old queue before entries from a new queue'2008 7,308,557'Method and apparatus for invalidating entries within a translation control entry (TCE) cache'2007 7,308,551'System and method for managing metrics table per virtual port in a logically partitioned data processing system'2007 7,290,077'Event queue structure and method'2007 7,283,473'Apparatus, system and method for providing multiple logical channel adapters within a single physical channel adapter in a system area network'2007 7,272,671'Means of control bits protection in a logical partition environment having a first and second distinct operating system'2007 7,266,631'Isolation of input/output adapter traffic class/virtual channel and input/output ordering domains'2007 7,260,664'Interrupt mechanism on an IO adapter that supports virtualization'2007 7,260,663'System and method for presenting interrupts'2007 7,100,163'Hypervisor virtualization of OS console and operator panel'2006 7,023,459'Virtual logical partition terminal'2006 7,010,633'Apparatus, system and method for controlling access to facilities based on usage classes'2006 7,003,611'Method and apparatus for handling interrupts using a set of interrupts servers associated with presentation controllers'2006 7,003,771'Logically partitioned processing system having hypervisor for creating a new translation table in response to OS request to directly access the non-assignable resource'2006 7,000,051'Apparatus and method for virtualizing interrupts in a logically partitioned computer system'2006 6,990,663'Hypervisor virtualization of OS console and operator panel'2006 6,973,510'DMA windowing in an LPAR environment using device arbitration level to allow multiple IOAs per terminal bridge'2005 6,961,785'Permanent open firmware PCI host bridge (PHB) unit addressing to support dynamic memory mapping and swapping of I/O drawers'2005 6,950,978'Method and apparatus for parity error recovery'2005 6,931,471'Method, apparatus, and computer program product for migrating data subject to access by input/output devices'2005 6,892,383'Hypervisor function sets'2005 6,877,158'Logical partitioning via hypervisor mediated address translation'2005 6,836,855'Recovery from data fetch errors in hypervisor code'2004 6,823,404'DMA windowing in an LPAR environment using device arbitration level to allow multiple IOAs per terminal bridge'2004 6,789,048'Method, apparatus, and computer program product for deconfiguring a processor'2004 6,751,679'Means of control bit protection in a logical partition environment'2004 6,725,284'Logical partition hosted virtual input/output using shared translation control entries'2004 6,658,591'Recovery from data fetch errors in hypervisor code'2003 6,654,906'Recovery from instruction fetch errors in hypervisor code'2003 6,643,727'Isolation of I/O bus errors to a single partition in an LPAR environment'2003 6,629,162'System, method, and product in a logically partitioned system for prohibiting I/O adapters from accessing memory assigned to other partitions during DMA'2003 6,523,140'Computer system error recovery and fault isolation'2003 6,430,643'Method and system for assigning interrupts among multiple interrupt presentation controllers'2002 6,189,065'Method and apparatus for interrupt load balancing for powerPC processors'2001 5,802,378'Performance monitoring in multiprocessor system with interrupt masking'1998 5,701,495'Scalable system interrupt structure for a multi-processing system'1997 4,130,756'Encoding mechanism for holed badge readers'1978 4,004,275'Self-clocking data entry unit system'1977

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1977–2021Patents assigned to IBM (133)· patent assignee history

1977–1978Based in Byron, MN, US· patent location history

1997–2021Based in Austin, TX, US· patent location history

2011–2019Patents assigned to ARNDT RICHARD L (12)· patent assignee history

2011–2014Patents assigned to ARNDT RICHARD LOUIS (9)· patent assignee history

2012–2016Patents assigned to NAYAR NARESH (5)· patent assignee history

2013–2016Patents assigned to RAWSON III FREEMAN L (5)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
IBM	133	1977–2021
ARNDT RICHARD Lself	12	2011–2019
ARNDT RICHARD LOUISself	9	2011–2014
NAYAR NARESH	5	2012–2016
RAWSON III FREEMAN L	5	2013–2016

Locations

Location	Patents	Span
Austin, Texas, US	131	1997–2021
Byron, Minnesota, US	2	1977–1978