Inventor

Thomas P. Thomas

Inventor
Beaverton, OR, US

Overview

22→
Patents
1997–2019
Patent span
Electricity
Primary field (CPC H)

Patents· 22 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing22%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses10%
G02BOptical elements, systems or apparatus8%
H03KPulse technique8%
H01LSemiconductor devices6%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use6%
H02HEmergency protective circuit arrangements4%
H03DDemodulation or transference of modulation from one carrier to another4%
H05KPrinted circuits4%
H10DInorganic electric semiconductor devices4%
PatentTitleYear
10,374,419Distributed electrostatic discharge protection for an on-package input/output architecture20199,535,865'Interconnection of multiple chips in a package'20179,519,609'On-package input/output architecture'20169,384,163'Non-linear termination for an on-package input/output architecture'20169,306,390'Distributed electrostatic discharge protection for an on-package input/output architecture'20169,143,120'Mechanisms for clock gating'20158,902,956'On-package input/output clustered interface having full and half-duplex modes'20148,736,328'Low power, jitter and latency clocking with common reference clock signals for on-package input/output interfaces'20147,724,078'Adjusting PLL/analog supply to track CPU core supply through a voltage regulator'20107,418,163'Optoelectrical package'20087,049,704'Flip-chip package integrating optical and electrical devices and coupling to a waveguide on a board'20066,856,129'Current probe device having an integrated amplifier'20056,760,801'Ground referenced voltage source input/output scheme for multi-drop bus'20046,754,407'Flip-chip package integrating optical and electrical devices and coupling to a waveguide on a board'20046,741,102'Phase frequency detector'20046,650,161'Clock distribution network having regulated power supply'20036,538,497'On-chip power supply boost for voltage droop reduction'20036,140,883'Tunable, energy efficient clocking scheme'20006,125,217'Clock distribution network'20005,963,058'Phase frequency detector'19995,904,698'Surgical shaving device for use within body conduits'19995,699,530'Circular RAM-based first-in/first-out buffer employing interleaved storage locations and cross pointers'1997

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1997–2019Patents assigned to INTEL CORP (20)· patent assignee history
1997–2019Based in Beaverton, OR, US· patent location history
1999Based in Menlo Park, CA, US· patent location history
2003–2004Based in Hillsboro, OR, US· patent location history
2008–2017Patents assigned to THOMAS THOMAS P (8)· patent assignee history
2014–2017Patents assigned to OSBORNE RANDY B (3)· patent assignee history
2016–2017Patents assigned to KUMAR RAJESH (3)· patent assignee history
2016Patents assigned to BALAMURUGAN GANESH (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INTEL CORP201997–2019
THOMAS THOMAS Pself82008–2017
KUMAR RAJESH32016–2017
OSBORNE RANDY B32014–2017
BALAMURUGAN GANESH22016
Locations
LocationPatentsSpan
Beaverton, OR, US181997–2019
Hillsboro, OR, US32003–2004
Menlo Park, California, US11999