Inventor
Akihisa Uchida
Inventor
Koganei, JP
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1026%
H10DInorganic electric semiconductor devices21%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests16%
G11CStatic stores10%
H10BElectronic memory devices9%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h107%
H01LSemiconductor devices3%
H03BGeneration of oscillations, directly or by frequency-changing, by circuits employing active elements which operate in a non-switching manner3%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses3%
G01RMeasuring electric variables2%
PatentTitleYear
9,503,018'Semiconductor device'20169,252,793'Semiconductor device'20167,073,147'Method of manufacturing a semiconductor device'20065,388,073'Semiconductor integrated circuit device and digital processor employing the same'19955,351,211'Semiconductor integrated circuit device having circuit inspection function'19945,214,302'Semiconductor integrated circuit device forming on a common substrate MISFETs isolated by a field oxide and bipolar transistors isolated by a groove'19935,200,348'Method of manufacturing semiconductor device with constant width deep groove isolation'19935,177,584'Semiconductor integrated circuit device having bipolar memory, and method of manufacturing the same'19935,141,888'Process of manufacturing semiconductor integrated circuit device having trench and field isolation regions'19925,128,740'Semiconductor integrated circuit device with isolation grooves and protruding portions'19925,084,402'Method of fabricating a semiconductor substrate, and semiconductor device, having thick oxide films and groove isolation'19925,029,127'Bipolar SRAM having word lines as vertically stacked pairs of conductive lines parallelly formed with holding current lines'19915,011,788'Process of manufacturing semiconductor integrated circuit device and product formed thereby'19914,949,162'Semiconductor integrated circuit with dummy pedestals'19904,926,378'Bipolar static RAM having two wiring lines for each word line'19904,926,235'Semiconductor device'19904,907,063'Semiconductor body, and device formed therefrom, having grooves with silicon nitride on the groove surfaces'19904,853,343'Method for fabricating a semiconductor integrated circuit device having thick oxide films and groove etch and refill'19894,819,054'Semiconductor IC with dual groove isolation'19894,809,052'Semiconductor memory device'19894,746,963'Isolation regions formed by locos followed with groove etch and refill'19884,700,464'Method of forming trench isolation in an integrated circuit'1987Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1987–1995Patents assigned to HITACHI LTD (17)· patent assignee history
1987–1990Patents assigned to HITACHI MICROCUMPUTER ENG (2)· patent assignee history
1987–1993Based in Koganei, JP· patent location history
1989–1993Based in Tachikawa, JP· patent location history
1990–2016Patents assigned to UCHIDA AKIHISA (2)· patent assignee history
1992–1993Based in Tokyo, JP· patent location history
1994–2006Based in Kokubunji, JP· patent location history
2016Patents assigned to RENESAS ELECTRONICS CORP (2)· patent assignee history
2016Patents assigned to FUNATO YOSHIHIRO (1)· patent assignee history
2016Based in Kanagawa, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| HITACHI LTD | 17 | 1987–1995 |
| HITACHI MICROCUMPUTER ENG | 2 | 1987–1990 |
| RENESAS ELECTRONICS CORP | 2 | 2016 |
| UCHIDA AKIHISAself | 2 | 1990–2016 |
| FUNATO YOSHIHIRO | 1 | 2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Koganei, JP | 8 | 1987–1993 |
| Tachikawa, JP | 6 | 1989–1993 |
| Kanagawa, JP | 2 | 2016 |
| Kokubunji, JP | 2 | 1994–2006 |
| Tokyo, JP | 2 | 1992–1993 |