Inventor

Paul A. Ronsheim

Inventor
Hopewell Junction, NY, US

Overview

18→
Patents
1993–2015
Patent span
Electricity
Primary field (CPC H)

Patents· 18 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices38%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1035%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests8%
H01LSemiconductor devices5%
H10BElectronic memory devices5%
C30BSingle-crystal growth3%
G01NInvestigating or analysing materials by determining their chemical or physical properties3%
G01TMeasurement of nuclear or x-radiation3%
PatentTitleYear
9,099,461'Method of manufacturing scaled equivalent oxide thickness gate stacks in semiconductor devices and related design structure'20158,900,973'Method to enable compressively strained pFET channel in a FinFET structure by implant and thermal diffusion'20148,347,741'Specimen handling apparatus'20138,158,449'Particle emission analysis for semiconductor fabrication steps'20128,114,748'Shallow extension regions having abrupt extension junctions'20127,071,103'Chemical treatment to retard diffusion in a semiconductor overlayer'20066,749,684'Method for improving CVD film quality utilizing polysilicon getterer'20046,635,517'Use of disposable spacer to introduce gettering in SOI layer'20036,509,241'Process for fabricating an MOS device having highly-localized halo regions'20036,399,434'Doped structures containing diffusion barriers'20026,387,782'Process of forming an ultra-shallow junction dopant layer having a peak concentration within a dielectric layer'20026,335,262'Method for fabricating different gate oxide thicknesses within the same chip'20026,329,704'Ultra-shallow junction dopant layer having a peak concentration within a dielectric layer'20016,194,736'Quantum conductive recrystallization barrier layers'20016,114,257'Process for modified oxidation of a semiconductor substrate using chlorine plasma'20005,656,514'Method for making heterojunction bipolar transistor with self-aligned retrograde emitter profile'19975,385,850'Method of forming a doped region in a semiconductor substrate utilizing a sacrificial epitaxial silicon layer'19955,194,397'Method for controlling interfacial oxide at a polycrystalline/monocrystalline silicon interface'1993

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1993–2015Patents assigned to IBM (18)· patent assignee history
1993–1997Based in Wappingers Falls, NY, US· patent location history
2000–2014Based in Hopewell Junction, NY, US· patent location history
2001–2002Patents assigned to INFINEON TECHNOLOGIES CORP (3)· patent assignee history
2012–2015Patents assigned to RONSHEIM PAUL A (3)· patent assignee history
2012–2013Patents assigned to RONSHEIM PAUL ANDREW (2)· patent assignee history
2014Patents assigned to BERLINER NATHANIEL C (1)· patent assignee history
2015Based in Barneveld, WI, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
IBM181993–2015
INFINEON TECHNOLOGIES CORP32001–2002
RONSHEIM PAUL Aself32012–2015
RONSHEIM PAUL ANDREWself22012–2013
BERLINER NATHANIEL C12014
Locations
LocationPatentsSpan
Hopewell Junction, New York, US142000–2014
Wappingers Falls, New York, US31993–1997
Barneveld, WI, US12015