Inventor
Gene W. Shen
Inventor
Mountain View, CA, US
Overview
Patents· 27 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing93%
H04LTransmission of digital information, e.g. telegraphic communication3%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use3%
PatentTitleYear
9,176,799'Hop-by-hop error detection in a server system'20158,086,825'Processing pipeline having stage-specific thread selection and method thereof'20117,861,066'Mechanism for predicting and suppressing instruction replay in a processor'20107,818,543'Method and apparatus for length decoding and identifying boundaries of variable length instructions'20107,818,542'Method and apparatus for length decoding variable length instructions'20107,793,080'Processing pipeline having parallel dispatch and method thereof'20107,743,232'Multiple-core processor with hierarchical microcode store'20107,725,690'Distributed dispatch with concurrent, out-of-order dispatch'20107,685,410'Redirect recovery cache that receives branch misprediction redirects and caches instructions to be dispatched in response to the redirects'20107,117,290'MicroTLB and micro tag for reducing power in a processor'20067,051,300'Method and system for architectural power estimation'20066,553,477'Microprocessor and address translation method for microprocessor'20035,966,530'Structure and method for instruction boundary machine state restoration'19995,896,526'Programmable instruction trap system and method'19995,838,940'Method and apparatus for rotating active instructions in a parallel data processor'19985,790,826'Reduced register-dependency checking for paired-instruction dispatch in a superscalar processor with partial register writes'19985,790,443'Mixed-modulo address generation using shadow segment registers'19985,751,985'Processor structure and method for tracking instruction status to maintain precise state'19985,687,336'Stack push/pop tracking and pairing in a pipelined processor'19975,675,759'Method and apparatus for register management using issue sequence prior physical register and register association validity information'19975,673,426'Processor structure and method for tracking floating-point exceptions'19975,659,721'Processor structure and method for checkpointing instructions to maintain precise state'19975,655,115'Processor structure and method for watchpoint of plural simultaneous unresolved branch evaluation'19975,651,124'Processor structure and method for aggressively scheduling long latency instructions including load/store instructions while maintaining precise state'19975,649,136'Processor structure and method for maintaining and restoring precise state at any instruction boundary'19975,644,742'Processor structure and method for a time-out checkpoint'19975,598,550'Cache controller for processing simultaneous cache accesses'1997Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1997–1998Patents assigned to HAL COMPUTER SYSTEMS INC (7)· patent assignee history
1997–2015Based in Mountain View, CA, US· patent location history
1997Based in Austin, TX, US· patent location history
1998–2003Patents assigned to FUJITSU LTD (4)· patent assignee history
1998Patents assigned to S3 INC (2)· patent assignee history
2003Based in Campbell, CA, US· patent location history
2006–2015Patents assigned to ADVANCED MICRO DEVICES INC (7)· patent assignee history
2006–2011Based in San Jose, CA, US· patent location history
2010Patents assigned to GLOBALFOUNDRIES INC (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| ADVANCED MICRO DEVICES INC | 7 | 2006–2015 |
| HAL COMPUTER SYSTEMS INC | 7 | 1997–1998 |
| FUJITSU LTD | 4 | 1998–2003 |
| GLOBALFOUNDRIES INC | 3 | 2010 |
| S3 INC | 2 | 1998 |
Locations
| Location | Patents | Span |
|---|---|---|
| Mountain View, California, US | 15 | 1997–2015 |
| San Jose, California, US | 10 | 2006–2011 |
| Campbell, California, US | 1 | 2003 |
| Austin, Texas, US | 1 | 1997 |