Inventor
Todd E. Takken
Inventor
Brewster, NY, US
Overview
Patents· 77 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing19%
H05KPrinted circuits13%
H04LTransmission of digital information, e.g. telegraphic communication10%
H01LSemiconductor devices6%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications5%
F04DNon-positive-displacement pumps5%
F24FAir-conditioning5%
G09GArrangements or circuits for control of indicating devices using static means to present variable information5%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems4%
PatentTitleYear
11,131,506Burst resistant thin wall heat sink202111,114,944Fully integrated multi-phase buck converter with coupled air core inductors202111,056,413Combined inductor and heat transfer device202111,058,030Cold plate with flex regions between fin areas202111,026,326Peripheral end face attachment of exposed copper layers of a first printed circuit board to the surface of a second printed circuit board by surface mount assembly202110,991,722Ultra low parasitic inductance integrated cascode GaN devices202110,972,083Supply voltage decoupling circuits for voltage droop mitigation202110,943,898High switching frequency, low loss and small form factor fully integrated power stage202110,939,543Unified conductor to lower the resistance between a planar transformer and one or more inductors202110,833,436Interdigitated power connector202010,779,436Space-efficient pressure relief mechanism for immersion cooling of computing elements202010,749,817High-density, fail-in-place switches for computer and data networks202010,740,097Embedding global barrier and collective in a torus network202010,712,102Injection-molded flexible cold plate202010,707,755Integrated circuits with programmable gate timing signal generation for power converters and apparatus comprising the same202010,631,438Mechanically flexible cold plates for low power components202010,587,060Electrical contacts on the sidewall of a circuit board202010,568,236Space-efficient pressure relief mechanism for immersion cooling of computing elements202010,535,650High switching frequency, low loss and small form factor fully integrated power stage202010,531,598Fans in series with cable plug interfaces202010,505,456Fully integrated multi-phase buck converter with coupled air core inductors201910,398,025Peripheral end face attachment of exposed copper layers of a first printed circuit board to the surface of a second printed circuit board by surface mount assembly201910,389,654High-density, fail-in-place switches for computer and data networks201910,381,929Voltage control utilizing multiple PWM patterns201910,321,564Solder assembly of pins to the peripheral end face of a printed circuit board201910,243,285Low resistance, low-inductance power connectors201910,222,125Burst resistant thin wall heat sink201910,215,504Flexible cold plate with enhanced flexibility201910,186,949Coupled-inductor DC-DC power converter201910,102,884Distributed serialized data buffer and a memory module for a cascadable and extended memory subsystem201810,097,090Voltage control utilizing multiple PWM patterns201810,068,886Implementing inverted master-slave 3D semiconductor stack201810,069,599Collective network for computer structures20189,971,713Multi-petascale highly efficient parallel supercomputer20189,922,900'Near-chip compliant layer for reducing perimeter stress during assembly process'20189,871,310'Low resistance, low-inductance power connectors'20189,831,783Power converter using near-load output capacitance, direct inductor contact, and/or remote current sense20179,823,858'Nonvolatile memory interface for metadata shadowing'20179,792,052'Nonvolatile memory interface for metadata shadowing'20179,634,959'High-density, fail-in-place switches for computer and data networks'20179,570,373'Near-chip compliant layer for reducing perimeter stress during assembly process'20179,569,109'Nonvolatile memory interface for metadata shadowing'20179,496,018'Nonvolatile memory interface for metadata shadowing'20169,374,414'Embedding global and collective in a torus network with message class map based tree path selection'20169,298,395'Memory system connector'20169,281,302'Implementing inverted master-slave 3D semiconductor stack'20169,244,759'Error recovery to enable error-free message transfer between nodes of a computer network'20169,112,953'Internet telephony unit and software for enabling internet telephone access from traditional telephone interface'20159,081,501'Multi-petascale highly efficient parallel supercomputer'20158,880,834'Low latency and persistent data storage'20148,788,879'Non-volatile memory for checkpoint storage'20148,667,049'Massively parallel supercomputer'20148,656,130'Low latency and persistent data storage'20148,626,957'Collective network for computer structures'20148,521,990'Embedding global barrier and collective in torus network with each node combining input from receivers according to class map for output to senders'20138,485,831'Tall mezzanine connector'20138,295,270'Internet telephony system for enabling internet telephone access from traditional telephone interface'20128,250,133'Massively parallel supercomputer'20128,010,875'Error correcting code with chip kill capability and power saving enhancement'20118,001,280'Collective network for computer structures'20118,001,401'Power throttling of collections of computing elements'20117,873,843'Static power reduction for midpoint-terminated busses'20117,818,514'Low latency memory access and synchronization'20107,761,687'Ultrascalable petaflop parallel supercomputer'20107,650,434'Global tree network for computing structures enabling global processing operations'20107,587,516'Class network routing'20097,555,566'Massively parallel supercomputer'20097,529,895'Method for prefetching non-contiguous data structures'20097,444,385'Global interrupt and barrier networks'20087,418,068'Data capture technique for high speed signaling'20087,383,490'Methods and apparatus using commutative error detection values for fault isolation in multiple node computers'20087,312,402'Method and apparatus for providing improved loop inductance of decoupling capacitors'20077,305,487'Optimized scalable network switch'20077,186,924'Dielectric structure for printed circuit board traces'20077,185,226'Fault tolerance in a supercomputer through dynamic repartitioning'20077,174,434'Low latency memory access and synchronization'20076,098,176'Sinusoidal clock signal distribution using resonant transmission lines'2000Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2000–2021Patents assigned to IBM (76)· patent assignee history
2000–2020Based in Mount Kisco, NY, US· patent location history
2007–2021Based in Brewster, NY, US· patent location history
2012–2015Patents assigned to TAKKEN TODD E (9)· patent assignee history
2012–2015Patents assigned to COTEUS PAUL W (7)· patent assignee history
2012–2015Patents assigned to CHEN DONG (6)· patent assignee history
2012–2015Patents assigned to BLUMRICH MATTHIAS A (5)· patent assignee history
2013–2018Based in Yorktown Heights, NY, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 76 | 2000–2021 |
| TAKKEN TODD Eself | 9 | 2012–2015 |
| COTEUS PAUL W | 7 | 2012–2015 |
| CHEN DONG | 6 | 2012–2015 |
| BLUMRICH MATTHIAS A | 5 | 2012–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Brewster, New York, US | 56 | 2007–2021 |
| Mount Kisco, New York, US | 17 | 2000–2020 |
| Yorktown Heights, New York, US | 4 | 2013–2018 |