Inventor

Yasutaka Tsuboi

Inventor
Yamanashi, JP

Overview

15→
Patents
1998–2018
Patent span
Electricity
Primary field (CPC H)

Patents· 15 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1024%
H05KPrinted circuits15%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1012%
F16BDevices for fastening or securing constructional elements or machine parts together, e.g. nails, bolts, circlips, clamps, clips or wedges9%
G06TImage data processing or generation, in general9%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests9%
B23KSoldering or unsoldering6%
G02FOptical devices or arrangements for the control of light by modification of the optical properties of the media of the elements involved therein6%
Y10TTechnical subjects covered by former us classification6%
B23QDetails, components, or accessories for machine tools, e.g. arrangements for copying or controlling3%
PatentTitleYear
10,058,019Bonding apparatus20189,872,395'Component crimping apparatus'20189,739,300'Component crimping apparatus'20179,703,129'Component mounting apparatus'20179,036,022'Component mounting apparatus, illuminating apparatus used in imaging and illuminating method'20157,516,878'Bump formation method and bump forming apparatus for semiconductor wafer'20097,052,984'Bump formation method and bump forming apparatus for semiconductor wafer'20067,031,509'Method and apparatus for correcting inclination of IC on semiconductor wafer'20067,021,357'Component mounting apparatus and component mounting method'20067,014,092'Bump forming apparatus for charge appearance semiconductor substrate, charge removal method for charge appearance semiconductor substrate, charge removing unit for charge appearance semiconductor substrate, and charge appearance semiconductor substrate'20067,005,368'BUMP FORMING APPARATUS FOR CHARGE APPEARANCE SEMICONDUCTOR SUBSTRATE, CHARGE REMOVAL METHOD FOR CHARGE APPEARANCE SEMICONDUCTOR SUBSTRATE, CHARGE REMOVING UNIT FOR CHARGE APPEARANCE SEMICONDUCTOR SUBSTRATE, AND CHARGE APPEARANCE SEMICONDUCTOR SUBSTRATE'20066,818,975'ELECTRIC CHARGE GENERATING SEMICONDUCTOR SUBSTRATE BUMP FORMING DEVICE, METHOD OF REMOVING ELECTRIC CHARGE FROM ELECTRIC CHARGE GENERATING SEMICONDUCTOR SUBSTRATE DEVICE FOR REMOVING ELECTRIC CHARGE FROM ELECTRIC CHARGE GENERATING SEMICONDUCTOR SUBSTRATE, AND ELECTRIC CHARGE GENERATING SEMICONDUCTOR SUBSTRATE'20046,542,238'Electronic component mounting apparatus'20035,872,863'Component detection method'19995,825,914'Component detection method'1998

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1998–2006Patents assigned to MATSUSHITA ELECTRIC INDUSTRIAL CO LTD (9)· patent assignee history
1998–2018Based in Yamanashi, JP· patent location history
2003Based in Osaka, JP· patent location history
2004–2009Based in Hirakata, JP· patent location history
2009–2018Patents assigned to PANASONIC CORP (3)· patent assignee history
2015–2018Patents assigned to PANASONIC IP MAN CO LTD (5)· patent assignee history
2015Patents assigned to ISHIMATSU KEN (1)· patent assignee history
2015Patents assigned to TSUBOI YASUTAKA (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD91998–2006
PANASONIC IP MAN CO LTD52015–2018
PANASONIC CORP32009–2018
ISHIMATSU KEN12015
TSUBOI YASUTAKAself12015
Locations
LocationPatentsSpan
Yamanashi, JP71998–2018
Hirakata, JP72004–2009
Osaka, JP12003