Inventor

Reid T. Copeland

Inventor

Markham, CA

Overview

2012–2021

Patent span

Physics

Primary field (CPC G)

Patents· 44 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing100%

PatentTitleYear

11,099,853Digit validation check control in instruction execution2021 11,068,246Control flow graph analysis2021 11,023,205Negative zero control in instruction execution2021 11,003,453Branch target buffer for emulation environments2021 10,990,390Decimal load immediate instruction2021 10,776,255Automatic verification of optimization of high level constructs using test vectors2020 10,725,780Convert to zoned format from decimal floating point format2020 10,719,324Convert to zoned format from decimal floating point format2020 10,664,252Inserting implicit sequence points into computer program code to support debug operations2020 10,534,612Hybrid polymorphic inline cache and branch target buffer prediction units for indirect branch prediction for emulation environments2020 10,430,185Decimal load immediate instruction2019 10,346,134Perform sign operation decimal instruction2019 10,331,408Decimal multiply and shift instruction2019 10,303,478Convert from zoned format to decimal floating point format2019 10,296,344Convert from zoned format to decimal floating point format2019 10,241,757Decimal shift and divide instruction2019 10,235,170Decimal load immediate instruction2019 10,235,137Decimal shift and divide instruction2019 10,175,946Perform sign operation decimal instruction2019 10,127,015Decimal multiply and shift instruction2018 9,921,814'Control flow graph analysis'2018 9,916,143'Inserting implicit sequence points into computer program code to support debug operations'2018 9,910,648'Inserting implicit sequence points into computer program code to support debug operations'2018 9,626,186'Hybrid polymoprhic inline cache and branch target buffer prediction units for indirect branch prediction for emulation environments'2017 9,563,536'Performance neutral isolation of runtime discrepancies in binary code'2017 9,335,993'Convert from zoned format to decimal floating point format'2016 9,335,995'Convert to zoned format from decimal floating point format'2016 9,335,994'Convert from zoned format to decimal floating point format'2016 9,329,861'Convert to zoned format from decimal floating point format'2016 9,317,292'Hybrid polymorphic inline cache and branch target buffer prediction units for indirect branch prediction for emulation environments'2016 9,286,190'Inserting implicit sequence points into computer program code to support debug operations'2016 9,274,931'Inserting implicit sequence points into computer program code to support debug operations'2016 9,235,420'Branch target buffer for emulation environments'2016 9,158,566'Page mapped spatially aware emulation of computer instruction set'2015 8,949,106'Just in time compiler in spatially aware emulation of a guest computer instruction set'2015 8,768,683'Self initialized host cell spatially aware emulation of a computer instruction set'2014 8,713,289'Efficiently emulating computer architecture condition code settings without executing branch instructions'2014 8,612,731'Branch target buffer for emulation environments'2013 8,555,266'Managing variable assignments in a program'2013 8,447,583'Self initialized host cell spatially aware emulation of a computer instruction set'2013 8,438,340'Executing atomic store disjoint instructions'2013 8,428,930'Page mapped spatially aware emulation of a computer instruction set'2013 8,364,461'Reusing invalidated traces in a system emulator'2013 8,301,434'Host cell spatially aware emulation of a guest wild branch'2012

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2012–2021Patents assigned to IBM (44)· patent assignee history

2012–2016Patents assigned to COPELAND REID T (10)· patent assignee history

2012–2016Patents assigned to MITRAN MARCEL (7)· patent assignee history

2012–2015Patents assigned to BOHIZIC THEODORE J (6)· patent assignee history

2012–2015Patents assigned to SHEIKH ALI I (5)· patent assignee history

2012–2021Based in Markham, CA· patent location history

2013–2021Based in Richmond Hill, CA· patent location history

2014–2015Based in Toronto, CA· patent location history

2017–2021Based in Ontario, CA· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
IBM	44	2012–2021
COPELAND REID Tself	10	2012–2016
MITRAN MARCEL	7	2012–2016
BOHIZIC THEODORE J	6	2012–2015
SHEIKH ALI I	5	2012–2015

Locations

Location	Patents	Span
Markham, CA	23	2012–2021
Richmond Hill, CA	16	2013–2021
Ontario, CA	3	2017–2021
Toronto, CA	2	2014–2015