Inventor
Keith K. Onodera
Inventor
Berkeley, CA, US
Overview
Patents· 5 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
B32Bprimary
B32BLayered products, i.e. products built-up of strata of flat or non-flat, e.g. cellular or honeycomb, form10%
H01HElectric switches10%
H03FAmplifiers10%
H03HImpedance networks, e.g. resonant circuits10%
H03KPulse technique10%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses10%
H04BTransmission10%
H04HBroadcast communication10%
H04LTransmission of digital information, e.g. telegraphic communication10%
H04WWireless communication networks10%
PatentTitleYear
7,865,150'Dual frequency band wireless LAN'20117,233,205'Transistor biasing independent of inductor voltage drop'20075,543,754'Capacitor and resistor controlled oscillator timing lock loop for precision time constants'19965,121,284'Driver circuit with feedback for limiting undershoot/overshoot and method'19924,794,281'Speed-up circuit for transistor logic output device'1988Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1988–1996Patents assigned to NAT SEMICONDUCTOR CORP (3)· patent assignee history
1988–1992Based in San Jose, CA, US· patent location history
1996–2011Based in Berkeley, CA, US· patent location history
2007–2011Patents assigned to ATHEROS COMM INC (2)· patent assignee history
2007Based in Mountain View, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NAT SEMICONDUCTOR CORP | 3 | 1988–1996 |
| ATHEROS COMM INC | 2 | 2007–2011 |
Locations
| Location | Patents | Span |
|---|---|---|
| Berkeley, California, US | 2 | 1996–2011 |
| San Jose, California, US | 2 | 1988–1992 |
| Mountain View, California, US | 1 | 2007 |