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Inventor

Kiminori Matsuno

Inventor
Osaka, JP

Overview

16→
Patents
2007–2012
Patent span
Physics
Primary field (CPC G)

Patents· 16 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing71%
G11CStatic stores24%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use5%
PatentTitleYear
8,327,068'Memory module, memory controller, nonvolatile storage, nonvolatile storage system, and memory read/write method'20128,161,225'Semiconductor memory card, access device and method'20128,051,270'Memory controller, nonvolatile storage device, nonvolatile storage system, and memory control method'20118,051,268'Memory controller, nonvolatile storage device, nonvolatile storage system, and nonvolatile memory address management method'20117,962,824'Memory controller, nonvolatile memory device, nonvolatile memory system and data writing method'20117,849,382'Memory control circuit, nonvolatile storage apparatus, and memory control method'20107,818,477'Storage device with buffer control unit'20107,793,192'Semiconductor memory device'20107,702,846'Memory controller, nonvolatile storage device, nonvolatile storage system, and data writing method'20107,654,466'Semiconductor memory card, semiconductor memory control apparatus, and semiconductor memory control method'20107,633,817'Semiconductor memory device, controller, and read/write control method thereof'20097,624,298'Memory card, data processor, memory card control method and memory card setting'20097,610,435'Nonvolatile memory device employing a write completion flag table'20097,475,185'Nonvolatile memory system, nonvolatile memory device, memory controller, access device, and method for controlling nonvolatile memory device'20097,360,012'Semiconductor memory device including memory controller for transmitting writing rate information to memory access device'20087,203,105'Semiconductor memory device, controller, and read/write control method thereof'2007

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2007–2010Based in Katano, JP· patent location history
2009–2012Patents assigned to PANASONIC CORP (14)· patent assignee history
2009–2012Based in Osaka, JP· patent location history
2012Patents assigned to INOUE MANABU (2)· patent assignee history
2012Patents assigned to IZUMI TOMOAKI (2)· patent assignee history
2012Patents assigned to KASAHARA TETSUSHI (2)· patent assignee history
2012Patents assigned to MATSUNO KIMINORI (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
PANASONIC CORP142009–2012
INOUE MANABU22012
IZUMI TOMOAKI22012
KASAHARA TETSUSHI22012
MATSUNO KIMINORIself22012
Locations
LocationPatentsSpan
Osaka, JP112009–2012
Katano, JP52007–2010