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Inventor

Ali-Reza Adi-Tabatabai

Inventor
Santa Clara, CA, US

Overview

5→
Patents
2008–2014
Patent span
Physics
Primary field (CPC G)

Patents· 5 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing63%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests38%
PatentTitleYear
8,812,792'Technique for using memory attributes'20148,190,845'System and method for allocating and deallocating memory within transactional code'20127,908,456'System and method for allocating and deallocating memory within transactional code'20117,636,829'System and method for allocating and deallocating memory within transactional code'20097,366,831'Lock-free bounded FIFO queue mechanism'2008

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2008–2014Patents assigned to INTEL CORP (5)· patent assignee history
2008–2014Based in Santa Clara, CA, US· patent location history
2012Patents assigned to ADI-TABATABAI ALI-REZA (1)· patent assignee history
2012Patents assigned to HERTZBERG BEN (1)· patent assignee history
2012Patents assigned to SAHA BRATIN (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INTEL CORP52008–2014
ADI-TABATABAI ALI-REZAself12012
HERTZBERG BEN12012
SAHA BRATIN12012
Locations
LocationPatentsSpan
Santa Clara, California, US52008–2014