Inventor

Giuseppe CARIELLO

Inventor

Overview

98→

Patents

2021–2026

Patent span

Physics

Primary field (CPC G)

Patents· 98 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing55%

G11CStatic stores33%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use9%

G01KMeasuring temperature1%

H04LTransmission of digital information, e.g. telegraphic communication1%

G01RMeasuring electric variables1%

G09GArrangements or circuits for control of indicating devices using static means to present variable information1%

PatentTitleYear

12,585,538Determining locations in NAND memory for boot-up code2026 12,572,292Identification and storage of boot information at a memory system2026 12,547,316Multi-plane cache transfer enhancement2026 12,541,465Buffer expansion for random write operations2026 12,487,745Suspending operations of a memory system2025 12,481,583Wear leveling techniques using data characteristics2025 12,468,451Sacrificial block pool2025 12,468,447Efficiency for consecutive read operations2025 12,462,891Multi-level cell maintenance operations2025 12,436,710Techniques for sequential access operations2025 12,422,985Write quality in memory systems2025 12,411,775Dual address encoding for logical-to-physical mapping2025 12,386,562Dynamic status registers array2025 12,386,543Opportunistic storage of non-write-boosted data in write booster cache memory2025 12,379,991Error detection event mechanism2025 12,353,723Low-power boot-up for memory systems2025 12,353,325Host logical-to-physical information refresh2025 12,354,638Signaling memory zone ranking information2025 12,346,582Techniques for memory system rebuild2025 12,248,705Dynamic memory address write policy translation based on performance needs2025 12,230,232Configurable types of write operations2025 12,223,184Distributed power up for a memory system2025 12,216,572Atomic write operations2025 12,189,522Techniques for suspend operations2025 12,182,407Monitoring flash memory erase progress using erase credits2024 12,182,015Weighted valid address count for garbage collection2024 12,159,041Techniques for failure management in memory systems2024 12,132,832Secure key update for replay protected memory blocks2024 12,124,322Access operation status signaling for memory systems2024 12,124,366Smart factory reset procedure2024 12,105,959Suspending operations of a memory system2024 12,099,449Using a flag to indicate whether a mapping entry points to sequentially stored data2024 12,099,748NAND temperature-aware operations2024 12,050,773Completion flag for memory operations2024 12,045,495Read latency and suspend modes2024 12,019,884Identification and storage of boot information at a memory system2024 12,014,073Techniques for sequential access operations2024 12,007,903Dual address encoding for logical-to-physical mapping2024 12,002,521Memory device error detection with improved scanning2024 11,989,438Secure self-purging memory partitions2024 11,972,144Dynamic status registers array2024 11,941,268System using a restricted operation mode memory indicator2024 11,934,303Atomic write operations2024 11,921,627Usage level identification for memory device addresses2024 11,899,532Determining locations in NAND memory for boot-up code2024 11,861,216Data recovery using barrier commands2024 11,861,177Configurable verify level for a set of data in a memory device2024 11,836,373Modified erase2023 11,817,145Programming multi-level memory cells2023 11,809,329Recovery of logical-to-physical table information for a memory device2023 11,798,637Current budget adaption2023 11,790,961Memory device access techniques2023 11,775,422Logic remapping techniques for memory devices2023 11,768,765Host device physical address encoding2023 11,763,861Reduced pin status register2023 11,755,490Unmap operation techniques2023 11,755,237Overwriting at a memory system2023 11,726,685Recovery of memory device from a reduced power state2023 11,726,718Temperature-based storage system organization2023 11,714,757Firmware loading for a memory controller2023 11,704,252Dual address encoding for logical-to-physical mapping2023 11,682,469Techniques for data programming2023 11,669,258Dynamic superblocks2023 11,663,123Page validity table colors for garbage collection2023 11,657,185Memory access gate2023 11,635,951Configurable NAND firmware search parameters2023 11,625,333Configurable flush operation speed2023 11,626,163Program voltage step based on program-suspend time2023 11,609,819NAND device mixed parity management2023 11,604,695Copy-back operations in a memory device2023 11,605,434Overwriting at a memory system2023 11,567,688Erasure of multiple blocks in memory devices2023 11,561,710Programmable peak power management2023 11,544,182Smart factory reset procedure using one or more commands at least on user data and system data2023 11,526,277Adjustable NAND write performance2022 11,507,518Logical-to-physical mapping using a flag to indicate whether a mapping entry points to [[for]] sequentially stored data2022 11,500,782Recovery of logical-to-physical table information for a memory device2022 11,487,652Host logical-to-physical information refresh2022 11,481,123Techniques for failure management in memory systems2022 11,481,141Secure self-purging memory partitions2022 11,467,901Disposable parity2022 11,435,944Dynamic memory address write policy translation based on performance needs2022 11,404,095Reduced pin status register2022 11,397,642Shared parity protection2022 11,380,419Methods to limit power during stress test and other limited supplies environment2022 11,348,659Adjustable voltage drop detection threshold in a memory device2022 11,321,468Systems for providing access to protected memory2022 11,288,149Flash memory block retirement policy2022 11,281,400Temperature-based storage system organization2022 11,276,461Programming multi-level memory cells2022 11,243,699System using a restricted operation mode memory indicator2022 11,237,953Host device physical address encoding2022 11,210,429Memory access gate2021 11,194,643Access operation status signaling for memory systems2021 11,189,359Techniques for data programming2021 11,157,416Firmware loading for a memory controller2021 11,144,471Dual address encoding for logical-to-physical mapping2021 11,139,035Memory device error detection with improved scanning2021

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2021–2026Patents assigned to MICRON TECHNOLOGY INC (97)· patent assignee history

2021–2026Based in US· patent location history

2025Patents assigned to LODESTAR LICENSING GROUP LLC (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
MICRON TECHNOLOGY INC	97	2021–2026
LODESTAR LICENSING GROUP LLC	1	2025

Locations

Location	Patents	Span
US	98	2021–2026