LexDanaLexDanabeta
Inventor

Kelly Brian Cameron

Inventor
Irvine, CA, US

Overview

142→
Patents
1986–2017
Patent span
Electricity
Primary field (CPC H)

Patents· 142 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H03Mprimary
H03MCoding47%
H04LTransmission of digital information, e.g. telegraphic communication38%
H04BTransmission6%
G11BInformation storage based on relative movement between record carrier and transducer4%
H04NPictorial communication, e.g. television1%
H04WWireless communication networks1%
H03KPulse technique1%
G06FElectric digital data processing0%
G11CStatic stores0%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests0%
PatentTitleYear
9,826,373'WLAN transmitter having high data throughput'20179,503,303'Symbol mapping for binary coding'20169,209,834'Symbol mapping for binary coding'20159,031,143'Adaptive decoding based on signal to noise ratio (SNR)'20158,964,895'WLAN transmitter having high data throughput'20158,898,547'Rate control adaptable communications'20148,811,271'Downstream time domain based adaptive modulation for DOCSIS based applications'20148,681,907'Iterative demapper'20148,683,288'Variable modulation with LDPC (low density parity check) coding'20148,631,312'LDPC (Low Density Parity Check) codes with corresponding parity check matrices selectively constructed with CSI (Cyclic Shifted Identity) and null sub-matrices'20148,483,122'Downstream time domain based adaptive modulation for DOCSIS based applications'20138,473,822'True bit level decoding of TTCM (turbo trellis coded modulation) of variable rates and signal constellations'20138,473,817'LDPC (low density parity check) code size adjustment by shortening and puncturing'20138,437,362'Asymmetrical MIMO wireless communications'20138,408,475'Flexible rate matching'20138,411,775'Iterative demapper'20138,407,556'LDPC (low density parity check) coding and interleaving implemented in MIMO communication systems'20138,370,731'LDPC (low density parity check) codes with corresponding parity check matrices selectively constructed with CSI (cyclic shifted identity) and null sub-matrices'20138,327,221'Overlapping sub-matrix based LDPC (low density parity check) decoder'20128,301,991'LDPC (low density parity check) coded modulation symbol decoding'20128,254,407'Asymmetrical MIMO wireless communications'20128,250,432'Variable modulation with LDPC (low density parity check) coding'20128,230,298'Overlapping sub-matrix based LDPC (low density parity check) decoder'20128,229,039'Flexible rate matching'20128,176,380'Algebraic construction of LDPC (low density parity check) codes with corresponding parity check matrix having CSI (cyclic shifted identity) sub-matrices'20128,145,987'LDPC (low density parity check) codes with corresponding parity check matrices selectively constructed with CSI (cyclic shifted identity) and null sub-matrices'20128,086,930'Fixed-spacing parity insertion for FEC (Forward Error Correction) codewords'20118,059,740'WLAN transmitter having high data throughput'20117,975,202'Variable modulation with LDPC (low density parity check) coding'20117,958,428'LDPC (low density parity check) coded signal decoding using parallel and simultaneous bit node and check node processing'20117,900,127'LDPC (Low Density Parity Check) codes with corresponding parity check matrices selectively constructed with CSI (Cyclic Shifted Identity) and null sub-matrices'20117,873,022'Multiple input multiple output wireless local area network communications'20117,849,389'LDPC (low density parity check) coded modulation symbol decoding'20107,848,466'Viterbi slicer for turbo codes'20107,746,886'Asymmetrical MIMO wireless communications'20107,715,503'Parallel concatenated code with soft-in soft-out interactive turbo decoder'20107,661,055'Partial-parallel implementation of LDPC (Low Density Parity Check) decoders'20107,657,822'True bit level decoding of TTCM (turbo trellis code modulation) of variable rates and signal constellations'20107,644,339'Overlapping sub-matrix based LDPC (low density parity check) decoder'20107,631,246'LDPC (low density parity check) code size adjustment by shortening and puncturing'20097,630,461'Low-latency high-speed trellis decoder'20097,617,442'Efficient construction of LDPC (Low Density Parity Check) codes with corresponding parity check matrix having CSI (Cyclic Shifted Identity) sub-matrices'20097,617,439'Algebraic construction of LDPC (Low Density Parity Check) codes with corresponding parity check matrix having CSI (Cyclic Shifted Identity) sub-matrices'20097,617,433'Implementation of LDPC (low density parity check) decoder by sweeping through sub-matrices'20097,617,441'Efficient construction of LDPC (Low Density Parity Check) codes with corresponding parity check matrix having CSI (Cyclic Shifted Identity) sub-matrices'20097,600,180'Iterative metric updating when decoding LDPC (low density parity check) coded signals and LDPC coded modulation signals'20097,587,008'Decoding error correcting codes transmitted through multiple wire twisted pair cables with uneven noise on the wires'20097,587,659'Efficient front end memory arrangement to support parallel bit node and check node processing in LDPC (Low Density Parity Check) decoders'20097,570,700'Parallel concatenated code with soft-in soft-out interactive turbo decoder'20097,559,010'Short length LDPC (Low Density Parity Check) code and modulation adapted for high speed Ethernet applications'20097,549,105'Construction of irregular LDPC (low density parity check) codes using RS (Reed-Solomon) codes or GRS (generalized Reed-Solomon) code'20097,536,629'Construction of LDPC (Low Density Parity Check) codes using GRS (Generalized Reed-Solomon) code'20097,530,002'Sub-matrix-based implementation of LDPC (Low Density Parity Check) decoder'20097,516,390'LDPC (Low Density Parity Check) coding and interleaving implemented in MIMO communication systems'20097,515,642'LDPC (Low Density Parity Check) coded 128 DSQ (Double Square QAM) constellation modulation and associated labeling'20097,508,785'Downstream time domain based adaptive modulation for DOCSIS based applications'20097,500,172'AMP (accelerated message passing) decoder adapted for LDPC (low density parity check) codes'20097,499,507'Synchronization module using a Viterbi slicer for a turbo decoder'20097,499,503'Parallel concatenated code with soft-in soft-out interactive turbo decoder'20097,472,335'Symbol by symbol variable code rate capable communication device'20087,464,317'Decoding LDPC (low density parity check) code and graphs using multiplication (or addition in log-domain) on both sides of bipartite graph'20087,460,608'Parallel concatenated code with soft-in soft-out interactive turbo decoder'20087,456,761'Interspersed training among encoded blocks of data within a data frame'20087,451,386'LDPC (Low Density Parity Check) coded modulation hybrid decoding'20087,447,985'Efficient design to implement min**/min**- or max**/max**- functions in LDPC (low density parity check) decoders'20087,447,984'System correcting random and/or burst errors using RS (Reed-Solomon) code, turbo/LDPC (Low Density Parity Check) code and convolutional interleave'20087,447,981'System correcting random and/or burst errors using RS (Reed-Solomon) code, turbo/LDPC (Low Density Parity Check) code and convolutional interleave'20087,440,521'Method of normalization of forward metric (alpha) and reverse metric (beta) in a map decoder'20087,436,902'Multi-dimensional space Gray code maps for multi-dimensional phase modulation as applied to LDPC (Low Density Parity Check) coded modulation'20087,421,034'Parallel concatenated code with soft-in soft-out interactive turbo decoder'20087,420,481'Interspersed training among data'20087,421,044'Quasi error free (QEF) communication using turbo codes'20087,415,079'Decoder design adaptable to decode coded signals using min* or max* processing'20087,409,006'Parallel concatenated code with soft-in-soft-out interactive turbo decoder'20087,409,628'Efficient design to implement LDPC (Low Density Parity Check) decoder'20087,406,650'Variable code rate and signal constellation turbo trellis coded modulation codec'20087,401,283'Amplifying magnitude metric of received signals during iterative decoding of LDPC (Low Density Parity Check) code and LDPC coded modulation'20087,395,487'Common circuitry supporting both bit node and check node processing in LDPC (Low Density Parity Check) decoder'20087,383,493'LDPC (Low Density Parity Check) coded modulation hybrid decoding using non-Gray code maps for improved performance'20087,383,485'Fast min*- or max*-circuit in LDPC (low density parity check) decoder'20087,383,487'IPHD (iterative parallel hybrid decoding) of various MLC (multi-level code) signals'20087,370,265'Bandwidth efficient coded modulation scheme based on MLC (multi-level code) signals having multiple maps'20087,360,146'Inverse function of min*:min*- (inverse function of max*:max*-)'20087,350,130'Decoding LDPC (low density parity check) code with new operators based on min* operator'20087,328,398'Low density parity check (LDPC) code decoder using min*, min**, max* or max** and their respective inverses'20087,322,005'LDPC (Low Density Parity Check) coded modulation symbol decoding using non-Gray code maps for improved performance'20087,321,633'Determination of variable code rates for a rate control sequence'20087,296,216'Stopping and/or reducing oscillations in low density parity check (LDPC) decoding'20077,281,192'LDPC (Low Density Parity Check) coded signal decoding using parallel and simultaneous bit node and check node processing'20077,242,726'Parallel concatenated code with soft-in soft-out interactive turbo decoder'20077,243,287'Decoding LDPC (Low Density Parity Check) code and graphs using multiplication (or addition in log-domain) on both sides of bipartite graph'20077,239,667'8 PSK rotationally invariant turbo trellis coded modulation without parallel transitions'20077,221,714'Non-systematic and non-linear PC-TCM (Parallel Concatenate Trellis Coded Modulation)'20077,216,283'Iterative metric updating when decoding LDPC (low density parity check) coded signals and LDPC coded modulation signals'20077,210,092'Symbol by symbol variable constellation type and/or mapping capable communication device'20077,197,690'Bandwidth efficient coded modulation scheme based on MLC (multi-level code) signals having multiple maps'20077,188,301'Parallel concatenated turbo code modulation encoder'20077,185,270'LDPC (low density parity check) coded modulation hybrid decoding'20077,159,170'LDPC (low density parity check) coded modulation symbol decoding'20077,158,589'Method and apparatus for parallel decoding of turbo encoded data'20077,149,953'Efficient LDPC code decoding with new minus operator in a finite precision radix system'20067,139,964'Variable modulation with LDPC (low density parity check) coding'20067,137,059'Single stage implementation of min*, max*, min and /or max to perform state metric calculation in SISO decoder'20067,111,226'Communication decoder employing single trellis to support multiple code rates and/or multiple modulations'20067,107,511'Low density parity check (LDPC) code decoder using min*, min**, max* or max** and their respective inverses'20067,107,512'TTCM decoder design'20067,093,187'Variable code rate and signal constellation turbo trellis coded modulation codec'20067,085,985'Close two constituent trellis of a turbo encoder within the interleave block'20067,080,310'Forward error corrector'20067,065,695'Metric calculation design for variable code rate decoding of broadband trellis, TCM, or TTCM'20067,062,700'16 QAM and 16 APSK TTCM (Turbo Trellis Coded Modulation) with minimum bandwidth efficiency of 3 bit/s/Hz using a rate 2/4 constituent encoder'20067,035,342'Parallel concatenated code with soft-in soft-out interactive turbo decoder'20067,032,164'Efficient design to calculate extrinsic information for soft-in-soft-out (SISO) decoder'20067,032,138'Generalized convolutional interleaver/de-interleaver'20067,024,597'Generalized convolutional interleaver/deinterleaver'20067,023,934'Method and apparatus for min star calculations in a map decoder'20067,017,106'Low density parity check (LDPC) code decoder using min*, min**, max* or max** and their respective inverses'20067,012,975'Method and apparatus for performing calculations for forward (alpha) and reverse (beta) metrics in a map decoder'20066,985,093'Interspersed training for turbo coded modulation'20066,982,659'Method and apparatus for iterative decoding'20066,940,929'Low-latency high-speed trellis decoder'20056,940,928'Method and apparatus for soft-in soft-out turbo code decoder'20056,897,791'Interspersed training for turbo coded modulation'20056,891,485'Interspersed training for turbo coded modulation'20056,828,926'Interspersed training for turbo coded modulation'20046,741,664'Low-latency high-speed trellis decoder'20046,697,975'Generalized convolutional interleaver/deinterleaver'20046,693,566'Interspersed training for turbo coded modulation'20046,686,853'Method and apparatus for iterative decoding'20046,684,364'Forward error corrector'20046,546,520'Generalized convolutional interleaver/deinterleaver'20036,539,516'Forward error corrector'20036,518,892'Stopping criteria for iterative decoding'20036,326,809'Apparatus for and method of eliminating single event upsets in combinational logic'20016,317,858'Forward error corrector'20016,133,747'Time redundant radiation tolerant logic'20005,689,452'Method and apparatus for performing arithmetic in large galois field GF(2.sup.n)'19975,339,077'Comma code generator'19945,170,399'Reed-Solomon Euclid algorithm decoder having a process configurable Euclid stack'19925,099,482'Apparatus for detecting uncorrectable error patterns when using Euclid\'s algorithm to decode Reed-Solomon (BCH) codes'19924,873,688'High-speed real-time Reed-Solomon decoder'19894,629,909'Flip-flop for storing data on both leading and trailing edges of clock signal'1986

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1986–1994Based in Moscow, ID, US· patent location history
1997Based in Albuquerque, NM, US· patent location history
2000–2017Based in Irvine, CA, US· patent location history
2001–2017Patents assigned to BROADCOM CORP (134)· patent assignee history
2011–2015Patents assigned to CAMERON KELLY BRIAN (20)· patent assignee history
2011–2015Patents assigned to SHEN BA-ZHONG (20)· patent assignee history
2011–2015Patents assigned to TRAN HAU THIEN (16)· patent assignee history
2011–2014Patents assigned to LEE TAK K (10)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
BROADCOM CORP1342001–2017
CAMERON KELLY BRIANself202011–2015
SHEN BA-ZHONG202011–2015
TRAN HAU THIEN162011–2015
LEE TAK K102011–2014
Locations
LocationPatentsSpan
Irvine, California, US1362000–2017
Moscow, ID, US51986–1994
Albuquerque, NM, US11997