Inventor
RAMACHARAN SUNDARARAMAN
Inventor
US
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing50%
G06NComputing arrangements based on specific computational models14%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use14%
G05BControl or regulating systems in general6%
G11CStatic stores6%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses6%
H04LTransmission of digital information, e.g. telegraphic communication6%
PatentTitleYear
12,572,433Dynamically reconfigured redundant lanes in a communication interface circuit between chiplets to increase redundancy when the probability of failure favors a particular communication direction202612,498,912System and methods for firmware update mechanism202512,430,280Mechanism to improve the reliability of sideband in chiplets202512,292,978System and method for SRAM less electronic device bootup using cache202512,174,757Apparatus and methods for reducing latencies associated with link state transitions within die interconnect architectures202411,927,932System and method to manage power to a desired power profile202411,921,904System and methods for firmware security mechanism202411,868,475System and methods for latency reduction for fuse reload post reset202411,836,501System and methods for hardware-based PCIe link up based on post silicon characterization202311,829,492System and method for hardware-based register protection mechanism202311,782,866Techniques to support mulitple interconnect protocols for an interconnect202311,734,608Address interleaving for machine learning202311,729,096Techniques to support multiple protocols between computer system interconnects202311,687,136System and method to manage power throttling202311,635,739System and method to manage power to a desired power profile202311,586,446System and methods for hardware-based PCIe link up based on post silicon characterization202311,340,673System and method to manage power throttling202211,334,258System and method for memory region protection202211,204,867PCIe controller with extensions to provide coherent memory mapping between accelerator memory and host memory2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2023Patents assigned to INTEL CORP (3)· patent assignee history
2021–2026Based in US· patent location history
2022–2025Patents assigned to MARVELL ASIA PTE LTD (13)· patent assignee history
2024–2026Patents assigned to QUALCOMM INC (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MARVELL ASIA PTE LTD | 13 | 2022–2025 |
| INTEL CORP | 3 | 2021–2023 |
| QUALCOMM INC | 3 | 2024–2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 19 | 2021–2026 |