Inventor
Mayukh Bhattacharya
Inventor
Palo Alto, CA, US
Overview
Patents· 4 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing75%
H03KPulse technique25%
PatentTitleYear
10,409,941Visual representation of circuit related data20199,032,352'Method of optimizing capacitive couplings in high-capacitance nets in simulation of post-layout circuits'20158,060,355'Automatic, hierarchy-independent partitioning method for transistor-level circuit simulation'20116,323,709'High-speed, compact, edge-triggered, flip-flop circuit'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001Based in Ann Arbor, MI, US· patent location history
2011–2019Patents assigned to SYNOPSYS INC (3)· patent assignee history
2011Patents assigned to BHATTACHARYA MAYUKH (1)· patent assignee history
2011Patents assigned to GULLAPALLI KIRAN (1)· patent assignee history
2011Patents assigned to KERNS KEVIN J (1)· patent assignee history
2011Patents assigned to RUDNAYA SVETLANA (1)· patent assignee history
2011Based in Fremont, CA, US· patent location history
2015–2019Based in Palo Alto, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SYNOPSYS INC | 3 | 2011–2019 |
| BHATTACHARYA MAYUKHself | 1 | 2011 |
| GULLAPALLI KIRAN | 1 | 2011 |
| KERNS KEVIN J | 1 | 2011 |
| RUDNAYA SVETLANA | 1 | 2011 |
Locations
| Location | Patents | Span |
|---|---|---|
| Palo Alto, California, US | 2 | 2015–2019 |
| Fremont, California, US | 1 | 2011 |
| Ann Arbor, MI, US | 1 | 2001 |