Inventor
In Kwon Jeong
Inventor
Cupertino, CA, US
Overview
Patents· 51 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices17%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1016%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests12%
B24BMachines, devices, or processes for grinding or polishing12%
H01CResistors12%
H10HInorganic light-emitting semiconductor devices having potential barriers12%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%
H01LSemiconductor devices5%
B08BCleaning in general3%
F25BRefrigeration machines, plants or systems1%
PatentTitleYear
10,600,933Vertical structure LEDs202010,461,217Vertical structure LEDs201910,453,993Vertical structure LEDs201910,243,101Vertical structure LEDs20199,882,084'Vertical structure LEDs'20189,472,727'Vertical structure LEDs'20169,224,907'Vertical structure LEDs'20158,896,017'Vertical structure LEDs'20148,384,120'Method of fabricating vertical structure LEDs'20137,928,465'Method of fabricating vertical structure LEDs'20117,816,705'Method of fabricating vertical structure LEDs'2010RE041842'Methods of forming electrical interconnects on integrated circuit substrates using selective slurries'20107,775,853'Configurable polishing apparatus'20107,674,154'Apparatus and method for polishing objects using object cleaners'20107,591,711'Apparatus and method for polishing semiconductor wafers using one or more polishing surfaces'20097,588,952'Method of fabricating vertical structure LEDs'20097,576,368'Method of fabricating vertical structure LEDs'20097,569,865'Method of fabricating vertical structure LEDs'20097,563,629'Method of fabricating vertical structure LEDs'20097,462,881'Method of fabricating vertical structure LEDs'20087,374,471'Apparatus and method for polishing semiconductor wafers using one or more pivotable load-and-unload cups'20087,367,866'Apparatus and method for polishing semiconductor wafers using pivotable load/unload cups'20087,364,496'Polishing head for polishing semiconductor wafers'20087,306,002'System and method for wet cleaning a semiconductor wafer'20077,258,124'Apparatus and method for treating surfaces of semiconductor wafers using ozone'20077,250,638'Method of fabricating vertical structure LEDs'20077,238,614'Methods for fabricating one or more metal damascene structures in a semiconductor wafer'20077,225,864'Multi-channel temperature control system for semiconductor processing facilities'20077,223,153'Apparatus and method for polishing semiconductor wafers using one or more polishing surfaces'20077,186,165'Apparatus and method for sequentially polishing and loading/unloading semiconductor wafers'20077,104,867'Apparatus and method for sequentially polishing and loading/unloading semiconductor wafers'20067,069,984'Multi-channel temperature control system for semiconductor processing facilities'20067,051,743'Apparatus and method for cleaning surfaces of semiconductor wafers using ozone'20067,022,193'Apparatus and method for treating surfaces of semiconductor wafers using ozone'20067,004,815'Apparatus and method for sequentially polishing and loading/unloading semiconductor wafers'20066,949,466'CMP apparatus and method for polishing multiple semiconductor wafers on a single polishing pad using multiple slurry delivery lines'20056,949,177'System and method for processing semiconductor wafers using different wafer processes'20056,942,545'Apparatus and method for sequentially polishing and loading/unloading semiconductor wafers'20056,905,398'Chemical mechanical polishing tool, apparatus and method'20056,835,118'Rigid plate assembly with polishing pad and method of using'20046,586,336'Chemical-mechanical-polishing station'20036,575,818'Apparatus and method for polishing multiple semiconductor wafers in parallel'20036,561,881'System and method for chemical mechanical polishing using multiple small polishing pads'20036,465,351'Method of forming a capacitor lower electrode using a CMP stopping layer'20026,323,558'Method for fabricating a contact of a semiconductor device'20016,251,790'Method for fabricating contacts in a semiconductor device'20016,121,146'Method for forming contact plugs of a semiconductor device'20006,117,766'Method of forming contact plugs in a semiconductor device'20005,961,377'Chemical mechanical polishing systems including brushes and related methods'19995,960,310'Polishing methods for forming a contact plug'19995,960,317'Methods of forming electrical interconnects on integrated circuit substrates using selective slurries'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2010Patents assigned to SAMSUNG ELECTRONICS CO LTD (9)· patent assignee history
1999–2002Based in Kyungki-do, KR· patent location history
2001Based in Kumi-shi, KR· patent location history
2003–2007Patents assigned to ORIOL INC (13)· patent assignee history
2003–2007Based in Sunnyvale, CA, US· patent location history
2005–2020Based in Cupertino, CA, US· patent location history
2007–2013Patents assigned to LG ELECTRONICS INC (9)· patent assignee history
2007–2008Patents assigned to INOPLA INC (5)· patent assignee history
2010Based in Seongnam, KR· patent location history
2014–2020Patents assigned to LG INNOTEK CO LTD (8)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| ORIOL INC | 13 | 2003–2007 |
| LG ELECTRONICS INC | 9 | 2007–2013 |
| SAMSUNG ELECTRONICS CO LTD | 9 | 1999–2010 |
| LG INNOTEK CO LTD | 8 | 2014–2020 |
| INOPLA INC | 5 | 2007–2008 |
Locations
| Location | Patents | Span |
|---|---|---|
| Cupertino, California, US | 30 | 2005–2020 |
| Sunnyvale, California, US | 12 | 2003–2007 |
| Kyungki-do, KR | 7 | 1999–2002 |
| Seongnam, KR | 1 | 2010 |
| Kumi-shi, KR | 1 | 2001 |