Inventor
Shashi D. Malaviya
Inventor
Fishkill, NY, US
Overview
Patents· 27 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1024%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1022%
H10DInorganic electric semiconductor devices15%
G11CStatic stores9%
C08GMacromolecular compounds obtained otherwise than by reactions only involving unsaturated carbon-to-carbon bonds5%
H10BElectronic memory devices5%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests5%
H03KPulse technique4%
G01RMeasuring electric variables2%
G06FElectric digital data processing2%
PatentTitleYear
6,809,710'Gray scale pixel driver for electronic display and method of operation therefor'20046,215,840'Method and apparatus for sequential memory addressing'20015,243,140'Direct distribution repair and engineering change system'19934,771,328'Semiconductor device and process'19884,764,799'Stud-defined integrated circuit structure'19884,758,528'Self-aligned metal process for integrated circuit metallization'19884,746,815'Electronic EC for minimizing EC pads'19884,743,781'Dotting circuit with inhibit function'19884,743,565'Lateral device structures using self-aligned fabrication techniques'19884,739,252'Current attenuator useful in a very low leakage current measuring device'19884,704,368'Method of making trench-incorporated monolithic semiconductor capacitor and high density dynamic memory cells including the capacitor'19874,688,073'Lateral device structures using self-aligned fabrication techniques'19874,661,832'Total dielectric isolation for integrated circuits'19874,648,173'Fabrication of stud-defined integrated circuit structure'19874,608,589'Self-aligned metal structure for integrated circuits'19864,584,763'One mask technique for substrate contacting in integrated circuits involving deep dielectric isolation'19864,508,579'Lateral device structures using self-aligned fabrication techniques'19854,502,913'Total dielectric isolation for integrated circuits'19854,431,305'High density DC stable memory cell'19844,409,673'Single isolation cell for DC stable memory'19834,400,865'Self-aligned metal process for integrated circuit metallization'19834,396,999'Tunneling transistor memory cell'19834,319,148'High speed 3-way exclusive OR logic circuit'19824,196,363'Open collector bit driver/sense amplifier'19804,131,861'Variable frequency oscillator system including two matched oscillators controlled by a phase locked loop'19784,058,808'High performance analog to digital converter for integrated circuits'19773,988,619'Random access solid-state image sensor with non-destructive read-out'1976Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1976–1993Patents assigned to IBM (25)· patent assignee history
1976–1988Based in Fishkill, NY, US· patent location history
1987Patents assigned to GOTH GEORGE R (1)· patent assignee history
1987Patents assigned to MALAVIYA SHASHI D (1)· patent assignee history
1987–2004Based in Hopewell Junction, NY, US· patent location history
2001–2004Patents assigned to EMAGIN CORP (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 25 | 1976–1993 |
| EMAGIN CORP | 2 | 2001–2004 |
| GOTH GEORGE R | 1 | 1987 |
| MALAVIYA SHASHI Dself | 1 | 1987 |
Locations
| Location | Patents | Span |
|---|---|---|
| Fishkill, New York, US | 18 | 1976–1988 |
| Hopewell Junction, New York, US | 9 | 1987–2004 |