Inventor

William R. McKee

Inventor

Plano, TX, US

Overview

1980–2010

Patent span

Electricity

Primary field (CPC H)

Patents· 40 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary

H10DInorganic electric semiconductor devices20%

H10BElectronic memory devices17%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1016%

G11CStatic stores15%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h108%

C30BSingle-crystal growth6%

B22FWorking metallic powder3%

G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices2%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%

B23KSoldering or unsoldering1%

PatentTitleYear

7,694,269'Method for positioning sub-resolution assist features'2010 7,458,058'Verifying a process margin of a mask pattern using intermediate stage models'2008 7,402,514'Line-to-line reliability enhancement using a dielectric liner for a low dielectric constant interlevel and intralevel (or intermetal and intrametal) dielectric layer'2008 7,323,727'System with meshed power and signal buses on cell array'2008 7,211,842'System with meshed power and signal buses on cell array'2007 6,967,371'System with meshed power and signal buses on cell array'2005 6,831,317'System with meshed power and signal buses on cell array'2004 6,815,742'System with meshed power and signal buses on cell array'2004 6,653,676'Integrated circuit capacitor'2003 6,559,050'Process for high thermal stable contact formation in manufacturing sub-quarter-micron CMOS devices'2003 6,528,888'Integrated circuit and method'2003 6,512,257'System with meshed power and signal buses on cell array'2003 6,461,955'Yield improvement of dual damascene fabrication through oxide filling'2002 6,396,088'System with meshed power and signal buses on cell array'2002 6,294,420'Integrated circuit capacitor'2001 6,288,925'System with meshed power and signal buses on cell array'2001 6,261,884'Method of fabricating and operating single polysilicon flash EEPROM with low positive programming and erasing voltage and small cell size'2001 6,239,479'Thermal neutron shielded integrated circuits'2001 6,218,311'Post-etch treatment of a semiconductor device'2001 6,115,279'System with meshed power and signal buses on cell array'2000 6,100,588'Multiple level conductor wordline strapping scheme'2000 6,096,597'Method for fabricating an integrated circuit structure'2000 6,069,813'System with meshed power and signal buses on cell array'2000 6,060,354'In-situ doped rough polysilicon storage cell structure formed using gas phase nucleation'2000 6,054,732'Single polysilicon flash EEPROM with low positive programming and erasing voltage and small cell size'2000 5,953,242'System with meshed power and signal buses on cell array'1999 5,352,913'Dynamic memory storage capacitor having reduced gated diode leakage'1994 5,252,506'Method to eliminate gate filaments on field plate isolated devices'1993 5,251,168'Boundary cells for improving retention time in memory devices'1993 5,247,254'Data recording system incorporating flaw detection circuitry'1993 5,216,265'Integrated circuit memory devices with high angle implant around top of trench to reduce gated diode leakage'1993 5,202,279'Poly sidewall process to reduce gated diode leakage'1993 5,112,762'High angle implant around top of trench to reduce gated diode leakage'1992 4,614,835'Photovoltaic solar arrays using silicon microparticles'1986 4,430,150'Production of single crystal semiconductors'1984 4,425,408'Production of single crystal semiconductors'1984 RE031473'System for fabrication of semiconductor bodies'1983 4,413,020'Device fabrication incorporating liquid assisted laser patterning of metallization'1983 4,322,379'Fabrication process for semiconductor bodies'1982 4,188,177'System for fabrication of semiconductor bodies'1980

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1980–2010Patents assigned to TEXAS INSTRUMENTS INC (37)· patent assignee history

1980–2008Based in Plano, TX, US· patent location history

1992Patents assigned to ANDERSON DIRK N (1)· patent assignee history

1992Patents assigned to CHUNG GISHI (1)· patent assignee history

1992Based in Collin, TX, US· patent location history

1993Based in Pleasanton, CA, US· patent location history

1999–2008Patents assigned to HITACHI LTD (7)· patent assignee history

2000–2003Patents assigned to HITACHI INC (2)· patent assignee history

2008–2010Based in Lucas, TX, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
TEXAS INSTRUMENTS INC	37	1980–2010
HITACHI LTD	7	1999–2008
HITACHI INC	2	2000–2003
ANDERSON DIRK N	1	1992
CHUNG GISHI	1	1992

Locations

Location	Patents	Span
Plano, Texas, US	36	1980–2008
Lucas, Texas, US	2	2008–2010
Pleasanton, California, US	1	1993
Collin, Texas, US	1	1992